Review of fuse and antifuse solutions for advanced standard CMOS technologies. - Elodie Ebrard; Bruno Allard; Philippe Candelier; Patrice Waltz (Microelectron. J., 2009)

Power analysis methodology for secure circuits. - Kamil Gomina; Jean-Baptiste Rigaud; Philippe Gendrier; Philippe Candelier; Assia Tria (DDECS, 2013)

Increasing the security level of analog IPs by using a dedicated vulnerability analysis methodology. - Noemie Beringuier-Boher; David Hély; Vincent Beroulle; Joel Damiens; Philippe Candelier (ISQED, 2013)

Voltage Glitch Attacks on Mixed-Signal Systems. - Noemie Beringuier-Boher; Kamil Gomina; David Hély; Jean-Baptiste Rigaud; Vincent Beroulle; Assia Tria; Joel Damiens; Philippe Gendrier; Philippe Candelier (DSD, 2014)

Laser attacks on integrated circuits: From CMOS to FD-SOI. - Jean-Max Dutertre; Stephan De Castro; Alexandre Sarafianos; Noemie Boher; Bruno Rouzeyre; Mathieu Lisart; Joel Damiens; Philippe Candelier; Marie-Lise Flottes; Giorgio Di Natale (DTIS, 2014)

Detecting positive voltage attacks on CMOS circuits. - Kamil Gomina; Philippe Gendrier; Philippe Candelier; Jean-Baptiste Rigaud; Assia Tria (CS2@HiPEAC, 2014)

Power supply glitch attacks: Design and evaluation of detection circuits. - Kamil Gomina; Jean-Baptiste Rigaud; Philippe Gendrier; Philippe Candelier; Assia Tria (HOST, 2014)

Laser-Induced Fault Effects in Security-Dedicated Circuits. - Vincent Beroulle; Philippe Candelier; Stephan De Castro; Giorgio Di Natale; Jean-Max Dutertre; Marie-Lise Flottes; David Hély; Guillaume Hubert; Régis Leveugle; Feng Lu; Paolo Maistri; Athanasios Papadimitriou; et al. (VLSI-SoC (Selected Papers), 2014)

Laser-induced fault effects in security-dedicated circuits. - Régis Leveugle; Paolo Maistri; Pierre Vanhauwaert; Feng Lu; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre; Athanasios Papadimitriou; David Hély; Vincent Beroulle; Guillaume Hubert; Stephan De Castro; et al. (VLSI-SoC, 2014)

Benefit of Al2O3/HfO2 bilayer for BEOL RRAM integration through 16kb memory cut characterization. - M. Azzaz; A. Benoist; Elisa Vianello; Daniele Garbin; Eric Jalaguier; Carlo Cagli; C. Charpin; Stefania Bernasconi; Simon Jeannot; T. Dewolf; G. Audoit; C. Guedj; et al. (ESSDERC, 2015)

Extended TDDB power-law validation for high-voltage applications such as OTP memories in High-k CMOS 28nm FDSOI technology. - A. Benoist; S. Denorme; X. Federspiel; Bruno Allard; Philippe Candelier (IRPS, 2015)

On the impact of OxRAM-based synapses variability on convolutional neural networks performance. - Daniele Garbin; Elisa Vianello; Olivier Bichler; M. Azzaz; Quentin Rafhay; Philippe Candelier; Christian Gamrat; Gérard Ghibaudo; Barbara De Salvo; Luca Perniola (NANOARCH, 2015)

Clock generator behavioral modeling for supply voltage glitch attack effects analysis. - Noemie Beringuier-Boher; Vincent Beroulle; David Hély; Joel Damiens; Philippe Candelier (Microprocess. Microsystems, 2016)

Laser Fault Injection at the CMOS 28 nm Technology Node: an Analysis of the Fault Model. - Jean-Max Dutertre; Vincent Beroulle; Philippe Candelier; Stephan De Castro; Louis-Barthelemy Faber; Marie-Lise Flottes; Philippe Gendrier; David Hély; Régis Leveugle; Paolo Maistri; Giorgio Di Natale; Athanasios Papadimitriou; et al. (FDTC, 2018)

The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks. - Jean-Max Dutertre; Vincent Beroulle; Philippe Candelier; Louis-Barthelemy Faber; Marie-Lise Flottes; Philippe Gendrier; David Hély; Régis Leveugle; Paolo Maistri; Giorgio Di Natale; Athanasios Papadimitriou; Bruno Rouzeyre (IOLTS, 2018)