A second-order high-resolution incremental A/D converter with offset and charge injection compensation. - Jacques Robert; Philippe Deval (IEEE J. Solid State Circuits, 1988)

SC Circuits: The State of the Art Compared to SI Techniques. - Gabor C. Temes; Philippe Deval; Vlado Valencic (ISCAS, 1993)

Lov-Voltage (3.3V) / Low-Power (100muW), 2MHZ CMOS Comparator for 12-BIT ADCS. - Philippe Deval; Vlado Valencic; Francis Anghinolfi (ISCAS, 1994)

A high-efficiency CMOS voltage doubler. - Pierre Favrat; Philippe Deval; Michel J. Declercq (IEEE J. Solid State Circuits, 1998)

A 2-V 600-μA 1-GHz BiCMOS super-regenerative receiver for ISM applications. - Patrick Favre; Norbert Joehl; Alexandre Vouilloz; Philippe Deval; Catherine Dehollain; Michel J. Declercq (IEEE J. Solid State Circuits, 1998)

CARIOCA-0.25 Sigma-Delta CMOS fast binary front-end for sensor interface using a novel current-mode feedback technique. - Danielle Moraes; Francis Anghinolfi; Philippe Deval; Pierre Jarron; Werner Riegler; Angelo Rivetti; Burkhard Schmidt 003 (ISCAS (1), 2001)

A low-power 1-GHz super-regenerative transceiver with time-shared PLL control. - Norbert Joehl; Catherine Dehollain; Patrick Favre; Philippe Deval; Michel J. Declercq (IEEE J. Solid State Circuits, 2001)

A low-power 22-bit incremental ADC with 4 ppm INL, 2 ppm gain error and 2 μV DC offset. - Vincent Quiquempoix; Philippe Deval; Alexandre Barreto; Gabriele Bellini; Jerry Collings; János Márkus; José B. Silva; Gabor C. Temes (ESSCIRC, 2005)

Incremental Delta-Sigma Structures for DC Measurement: an Overview. - János Márkus; Philippe Deval; Vincent Quiquempoix; José B. Silva; Gabor C. Temes (CICC, 2006)

A low-power 22-bit incremental ADC. - Vincent Quiquempoix; Philippe Deval; Alexandre Barreto; Gabriele Bellini; János Márkus; José B. Silva; Gabor C. Temes (IEEE J. Solid State Circuits, 2006)