APLYSIE : un circuit neuro-mimétique : réalisation et intégration sur tranche. (APLYSIE: a neuro-mimetic integrated circuit. Design and wafer scale integration). - Philippe Hurat (1989)

A Practical Application of Full-Feature Alternating Phase-Shifting Technology for a Phase-Aware Standard-Cell Design Flow. - Michael Sanie; Michel Côté; Philippe Hurat; Vinod Malhotra (DAC, 2001)

Layout Printability Optimization Using a Silicon Simulation Methodology. - Michel Côté; Philippe Hurat (ISQED, 2004)

Standard Cell Printability Grading and Hot Spot Detection. - Michel Côté; Philippe Hurat (ISQED, 2005)

DFM: Linking Design and Manufacturing. - Srinivas Raghvendra; Philippe Hurat (VLSI Design, 2005)

Modeling and Validation of Silicon Contour-Based Extraction and Simulation of Non-Uniform Devices. - Thierry Devoivre; Richard Rouse; Nishath Verghese; Philippe Hurat (CICC, 2007)

Addressing Parametric Impact of Systematic Pattern Variations in Digital IC Design. - Pei-Hua Wang; Brian Lee; Gus Han; Richard Rouse; Philippe Hurat; Nishath Verghese (CICC, 2007)

Context-specific leakage and delay analysis of a 65nm standard cell library for lithography-induced variability. - Darsun Tsiena; Chien Kuo Wang; William W. J. Wang; Yajun Ran; Philippe Hurat; Nishath Verghese (SoCC, 2007)

Predictive models and CAD methodology for pattern dependent variability. - Nishath Verghese; Richard Rouse; Philippe Hurat (ASP-DAC, 2008)