Panel: When Will the Analog Design Flow Catch Up with Digital Methodology? - Georges G. E. Gielen; Mike Sottak; Mike Murray; Linda Kaye; Maria del Mar Hershenson; Kenneth S. Kundert; Philippe Magarshack; Akria Matsuzawa; Ronald A. Rohrer; Ping Yang 001 (DAC, 2001)

Quality of SoC Designs through Quality of the Design Flow: Status and Needs. - Philippe Magarshack (ISQED, 2001)

Systems-on-chip needs for embedded software development: an industrial perspective. - Philippe Magarshack (LCTES-SCOPES, 2002)

SoC's Trends and Challenges going to 0.10µm. - Philippe Magarshack (MTDT, 2002)

Improving SoC Design Quality through a Reproducible Design Flow. - Philippe Magarshack (IEEE Des. Test Comput., 2002)

Fast, cheap and under control: the next implementation fabric. - Abbas El Gamal; Ivo Bolsens; Andy Broom; Christopher Hamlin; Philippe Magarshack; Zvi Or-Bach; Lawrence T. Pileggi (DAC, 2003)

System-on-chip beyond the nanometer wall. - Philippe Magarshack; Pierre G. Paulin (DAC, 2003)

Invited Keynote: Building Yield into Systems-on-Chips for Nanometer Technologies. - Philippe Magarshack (VTS, 2003)

Guest Editors' Introduction: Design for Yield and Reliability. - Yervant Zorian; Dimitris Gizopoulos; Cary Vandenberg; Philippe Magarshack (IEEE Des. Test Comput., 2004)

"The IC nanometer race – what will it take to win?". - Gadi Singer; Philippe Magarshack; Dennis Buss; Fu-Chieh Hsu; Ho-Kyu Kang (DAC, 2006)

DFM/DFY: should you trust the surgeon or the family doctor? - Marco Casale-Rossi; Andrzej J. Strojwas; Robert C. Aitken; Antun Domic; Carlo Guardiani; Philippe Magarshack; Douglas Pattullo; Joseph Sawicki (DATE, 2007)

Design challenges in 45nm and below: DFM, low-power and design for reliability. - Philippe Magarshack (ACM Great Lakes Symposium on VLSI, 2007)

Low-Power Design Solutions forWireless Multimedia SoCs. - Jean-Pierre Schoellkopf; Philippe Magarshack (IEEE Des. Test Comput., 2009)

3-D stacked die: now or future? - Samta Bansal; Juan C. Rey; Andrew Yang; Myung-Soo Jang; L. C. Lu; Philippe Magarshack; Pol Marchal; Riko Radojcic (DAC, 2010)

Beyond the horizon: The next 10x reduction in power - Challenges and solutions. - Jan M. Rabaey; Hugo De Man; Mark Horowitz; Takayasu Sakurai; Jack Sun; Dan Dobberpuhl; Kiyoo Itoh 001; Philippe Magarshack; Asad A. Abidi; Hermann Eul (ISSCC, 2011)

Gaining 10x in energy efficiency in the next decade in consumer products. - Philippe Magarshack; Andreia Cathelin (VLSI-DAT, 2012)

UTBB FD-SOI: a process/design symbiosis for breakthrough energy-efficiency. - Philippe Magarshack; Philippe Flatresse; Giorgio Cesana (DATE, 2013)

Panel: Emerging vs. established technologies, a two sphinxes' riddle at the crossroads? - Marco Casale-Rossi; Giovanni De Micheli; Rob Aitken; Antun Domic; Manfred Horstmann; Robert Hum; Philippe Magarshack (DATE, 2014)

27.1 A 460MHz at 397mV, 2.6GHz at 1.3V, 32b VLIW DSP, embedding FMAX tracking. - Robin Wilson; Edith Beigné; Philippe Flatresse; Alexandre Valentian; Fady Abouzeid; Thomas Benoist; Christian Bernard; Sebastien Bernard; Olivier Billoint; Sylvain Clerc; Bastien Giraud; Anuj Grover; et al. (ISSCC, 2014)

A 3 GHz Dual Core Processor ARM Cortex TM -A9 in 28 nm UTBB FD-SOI CMOS With Ultra-Wide Voltage Range and Energy Efficiency Optimization. - David Jacquet; Frederic Hasbani; Philippe Flatresse; Robin Wilson; Franck Arnaud; Giorgio Cesana; Thierry Di Gilio; Christophe Lecocq; Tanmoy Roy; Amit Chhabra; Chiranjeev Grover; Olivier Minez; et al. (IEEE J. Solid State Circuits, 2014)

Breakthrough technologies and reference designs for new IoT applications. - Philippe Magarshack (VLSIC, 2015)