Vector addressing processor for direct and indirect accesses. - Jean-Luc Dekeyser; Philippe Marquet; Philippe Preux (Microprocessing and Microprogramming, 1990)

EVA: an explicit vector language. - Jean-Luc Dekeyser; Philippe Marquet; Philippe Preux (ACM SIGPLAN Notices, 1990)

Performance improvement for vector pipeline multiprocessor systems using a disordered execution model. - M. Tahar Kechadi; Jean-Luc Dekeyser; Philippe Marquet; Philippe Preux (ISCA, 1992)

HelpDraw Graphical Environment: A Step Beyond Data Parallel Programming Languages. - Akram-Djellal Benalia; Jean-Luc Dekeyser; Philippe Marquet (HCI (2), 1993)

HELP for parallel scientific programming. - J.-L. Dekeyseer; Dominique Lazure; Philippe Marquet (PDP, 1993)

Dynamic Load Balancing on SIMD Data-Parallel Computers. - Cyril Fonlupt; Jean-Luc Dekeyser; Philippe Marquet (EUROSIM, 1994)

A Data-Parallel View of the Load Balancing - Experimental Results on MasPar MP-1. - Cyril Fonlupt; Philippe Marquet; Jean-Luc Dekeyser (HPCN, 1994)

A Geometrical Data-Parallel Language. - Jean-Luc Dekeyser; Dominique Lazure; Philippe Marquet (ACM SIGPLAN Notices, 1994)

Analysis of Synchronous Dynamic Load Balancing Algorithms. - Cyril Fonlupt; Philippe Marquet; Jean-Luc Dekeyser (PARCO, 1995)

Supporting Irregular and Dynamic Computations in Data Parallel Languages. - Jean-Luc Dekeyser; Philippe Marquet (The Data Parallel Programming Model, 1996)

Mixed synchronous-asynchronous approach for real-time image processing: a MPEG-like coder. - David Galinec; Jean-Luc Dekeyser; Philippe Marquet (ICIP (2), 1996)

Irregular Data-Parallel Objects in C++. - Jean-Luc Dekeyser; Boris Kokoszko; Jean-Luc Levaire; Philippe Marquet (VECPAR, 1996)

DPFS: A Data-Parallel File System Environment. - Dominique Sueur; Jean-Luc Dekeyser; Philippe Marquet (HPCN Europe, 1998)

Data-Parallel Load Balancing Strategies. - Cyril Fonlupt; Philippe Marquet; Jean-Luc Dekeyser (Parallel Comput., 1998)

Compilation Principle of a Specification Language Dedicated to Signal Processing. - Julien Soula; Philippe Marquet; Alain Demeure; Jean-Luc Dekeyser (PaCT, 2001)

Visual Data-Parallel Programming for Signal Processing Applications. - Pierre Boulet; Jean-Luc Dekeyser; Jean-Luc Levaire; Philippe Marquet; Julien Soula; Alain Demeure (PDP, 2001)

An Asymmetric Real-Time Scheduling for Linux. - Momtchil Momtchev; Philippe Marquet (IPDPS, 2002)

GASPARD - A Visual Parallel Programming Environment. - Florent Devin; Pierre Boulet; Jean-Luc Dekeyser; Philippe Marquet (PARELEC, 2002)

MDA for SoC Design, Intensive Signal Processing Experiment. - Pierre Boulet; Jean-Luc Dekeyser; Cédric Dumoulin; Philippe Marquet (FDL, 2003)

UML2 as an ADL Hierarchichal Hardware Modeling. - Arnaud Cuccuru; Philippe Marquet; Jean-Luc Dekeyser (IFIP-WADL, 2004)

Design of a Real-Time Scheduler for Kahn Process Networks on Multiprocessor Systems. - Javed Dulloo; Philippe Marquet (PDPTA, 2004)

SOAP Based Distributed Simulation Environment for SoC Design. - Samy Meftali; Anouar Dziri; Luc Charest; Philippe Marquet; J. Deskeyser (FDL, 2005)

Asymmetric Scheduling and Load Balancing for Real-Time on Linux SMP. - Éric Piel; Philippe Marquet; Julien Soula; Jean-Luc Dekeyser (PPAM, 2005)

Towards UML 2 Extensions for Compact Modeling of Regular Complex Topologies. - Arnaud Cuccuru; Jean-Luc Dekeyser; Philippe Marquet; Pierre Boulet (MoDELS, 2005)

FPGA Implementation of Embedded Cruise Control and Anti-Collision Radar. - Sébastien Le Beux; Philippe Marquet; Ouassila Labbani; Jean-Luc Dekeyser (DSD, 2006)

Real-time systems for multiprocessor architectures. - Éric Piel; Philippe Marquet; Julien Soula; Jean-Luc Dekeyser (IPDPS, 2006)

Massively parallel processing on a chip. - Philippe Marquet; Simon Duquennoy; Sébastien Le Beux; Samy Meftali; Jean-Luc Dekeyser (Conf. Computing Frontiers, 2007)

Repetitive Allocation Modelling with MARTE. - Pierre Boulet; Philippe Marquet; Éric Piel; Julien Taillard (FDL, 2007)

A Design Flow to Map Parallel Applications onto FPGAs. - Sébastien Le Beux; Philippe Marquet; Jean-Luc Dekeyser (FPL, 2007)

Model Transformations for the Compilation of Multi-processor Systems-on-Chip. - Éric Piel; Philippe Marquet; Jean-Luc Dekeyser (GTTSE, 2007)

Multiple Abstraction Views of FPGA to Map Parallel Applications. - Sébastien Le Beux; Philippe Marquet; Jean-Luc Dekeyser (ReCoSoC, 2007)

Multilevel MPSOC simulation using an MDE approach. - Rabie Ben Atitallah; Éric Piel; Smaïl Niar; Philippe Marquet; Jean-Luc Dekeyser (SoCC, 2007)

Study and integration of a parametric neighbouring interconnection network in a massively parallel architecture on FPGA. - Mouna Baklouti; Mohamed Abid; Philippe Marquet; Jean-Luc Dekeyser (AICCSA, 2009)

Reconfigurable Communication Networks in a Parametric SIMD Parallel System on Chip. - Mouna Baklouti; Philippe Marquet; Jean-Luc Dekeyser; Mohamed Abid (ARC, 2010)

IP Based Configurable SIMD Massively Parallel SoC. - Mouna Baklouti; Mohamed Abid; Philippe Marquet; Jean-Luc Dekeyser (FPL, 2010)

Scalable mpNoC for massively parallel systems - Design and implementation on FPGA. - Mouna Baklouti; Yassine Aydi; Philippe Marquet; Jean-Luc Dekeyser; Mohamed Abid (J. Syst. Archit., 2010)

A model-driven based framework for rapid parallel SoC FPGA prototyping. - Mouna Baklouti; Manel Ammar; Philippe Marquet; Mohamed Abid; Jean-Luc Dekeyser (International Symposium on Rapid System Prototyping, 2011)

A Model-Driven Design Framework for Massively Parallel Embedded Systems. - Abdoulaye Gamatié; Sébastien Le Beux; Éric Piel; Rabie Ben Atitallah; Anne Etien; Philippe Marquet; Jean-Luc Dekeyser (ACM Trans. Embed. Comput. Syst., 2011)

Broadcast with mask on a massively parallel processing on a chip. - Hana Krichene; Mouna Baklouti; Mohamed Abid; Philippe Marquet; Jean-Luc Dekeyser (HPCS, 2012)

A fast MPSoC virtual prototyping for intensive signal processing applications. - Rabie Ben Atitallah; Éric Piel; Smaïl Niar; Philippe Marquet; Jean-Luc Dekeyser (Microprocess. Microsystems, 2012)

Master-Slave Control Structure for Massively Parallel System on Chip. - Hana Krichene; Mouna Baklouti; Mohamed Abid; Philippe Marquet; Jean-Luc Dekeyser (DSD, 2013)

FPGA-based many-core System-on-Chip design. - Mouna Baklouti; Philippe Marquet; Jean-Luc Dekeyser; Mohamed Abid (Microprocess. Microsystems, 2015)

SCAC-Net: Reconfigurable Interconnection Network in SCAC Massively Parallel SoC. - Hana Krichene; Mouna Baklouti; Philippe Marquet; Jean-Luc Dekeyser; Mohamed Abid (PDP, 2016)

SCAC: Weakly-coupled execution model for massively parallel systems. - Hana Krichene; Mouna Baklouti; Philippe Marquet; Jean-Luc Dekeyser; Mohamed Abid (Microprocess. Microsystems, 2019)

How to Integrate Environmental Challenges in Computing Curricula? - Anne-Laure Ligozat; Kevin Marquet; Aurélie Bugeau; Julien Lefèvre; Pierre Boulet; Sylvain Bouveret; Philippe Marquet; Olivier Ridoux; Olivier Michel 001 (SIGCSE (1), 2022)