Network-on-Chip: The Intelligence is in The Wire. - Gérard Mas; Philippe Martin 005 (ICCD, 2004)

Design of a Virtual Component Neutral Network-on-Chip Transaction Layer. - Philippe Martin 005 (DATE, 2005)

The MOSART Mapping Optimization for Multi-Core ARchiTectures. - Bernard Candaele; Sylvain Aguirre; Michel Sarlotte; Iraklis Anagnostopoulos; Sotirios Xydis; Alexandros Bartzas; Dimitris Bekiaris; Dimitrios Soudris; Zhonghai Lu; Xiaowen Chen; Jean-Michel Chabloz; Ahmed Hemani; et al. (ISVLSI (Selected papers), 2010)

Mapping Optimisation for Scalable Multi-core ARchiTecture: The MOSART Approach. - Bernard Candaele; Sylvain Aguirre; Michel Sarlotte; Iraklis Anagnostopoulos; Sotirios Xydis; Alexandros Bartzas; Dimitris Bekiaris; Dimitrios Soudris; Zhonghai Lu; Xiaowen Chen; Jean-Michel Chabloz; Ahmed Hemani; et al. (ISVLSI, 2010)