Internal Power Dissipation Modeling and Minimization for Submicronic CMOS Design. - Philippe Maurine; Mustapha Rezzoug; Daniel Auvergne (PATMOS, 2000)

Second Generation Delay Model for Submicron CMOS Process. - Mustapha Rezzoug; Philippe Maurine; Daniel Auvergne (PATMOS, 2000)

Feasible Delay Bound Definition. - Nadine Azémard; M. Aline; Philippe Maurine; Daniel Auvergne (VLSI-SOC, 2001)

Gate Sizing for Low Power Design. - Philippe Maurine; Nadine Azémard; Daniel Auvergne (VLSI-SOC, 2001)

Output transition time modeling of CMOS structures. - Philippe Maurine; Mustapha Rezzoug; Daniel Auvergne (ISCAS (5), 2001)

Gate speed improvement at minimal power dissipation. - Philippe Maurine; Xavier Michel; Nadine Azémard; Daniel Auvergne (APCCAS (2), 2002)

Structure Independent Representation of Output Transition Time for CMOS Library. - Philippe Maurine; Nadine Azémard; Daniel Auvergne (PATMOS, 2002)

Transition time modeling in deep submicron CMOS. - Philippe Maurine; Mustapha Rezzoug; Nadine Azémard; Daniel Auvergne (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002)

Continuous representation of the performance of a CMOS library. - B. Lasbouygues; Joel Schindler; Sylvain Engels; Philippe Maurine; Nadine Azémard; Daniel Auvergne (ESSCIRC, 2003)

Statistic Implementation of QDI Asynchronous Primitives. - Philippe Maurine; Jean-Baptiste Rigaud; G. Fraidy Bouesse; Gilles Sicard; Marc Renaudin (PATMOS, 2003)

Metric Definition for Circuit Speed Optimization. - Xavier Michel; Alexandre Verle; Nadine Azémard; Philippe Maurine; Daniel Auvergne (PATMOS, 2003)

CMOS Gate Sizing under Delay Constraint. - Alexandre Verle; Xavier Michel; Philippe Maurine; Nadine Azémard; Daniel Auvergne (PATMOS, 2003)

Delay bound based CMOS gate sizing technique. - Alexandre Verle; Xavier Michel; Philippe Maurine; Nadine Azémard; Daniel Auvergne (ISCAS (5), 2004)

Design Optimization with Automated Cell Generation. - A. Landrault; Nadine Azémard; Philippe Maurine; Michel Robert; Daniel Auvergne (PATMOS, 2004)

Temperature Dependence in Low Power CMOS UDSM Process. - B. Lasbouygues; Robin Wilson; Philippe Maurine; Nadine Azémard; Daniel Auvergne (PATMOS, 2004)

Physical Extension of the Logical Effort Model. - B. Lasbouygues; Robin Wilson; Philippe Maurine; Nadine Azémard; Daniel Auvergne (PATMOS, 2004)

Performance Metric Based Optimization Protocol. - Xavier Michel; Alexandre Verle; Philippe Maurine; Nadine Azémard; Daniel Auvergne (PATMOS, 2004)

Low Power Oriented CMOS Circuit Optimization Protocol. - Alexandre Verle; Xavier Michel; Nadine Azémard; Philippe Maurine; Daniel Auvergne (DATE, 2005)

Circuit optimization based on speed indicators. - Alexandre Verle; A. Landrault; Philippe Maurine; Nadine Azémard (ICECS, 2005)

Temperature Dependency in UDSM Process. - B. Lasbouygues; Robin Wilson; Nadine Azémard; Philippe Maurine (PATMOS, 2005)

A Method to Design Compact Dual-rail Asynchronous Primitives. - Alin Razafindraibe; Michel Robert; Marc Renaudin; Philippe Maurine (PATMOS, 2005)

Speed Indicators for Circuit Optimization. - Alexandre Verle; A. Landrault; Philippe Maurine; Nadine Azémard (PATMOS, 2005)

Compact and Secured Primitives for the Design of Asynchronous Circuits. - Alin Razafindraibe; Michel Robert; Philippe Maurine (J. Low Power Electron., 2005)

Request-skip adders : CMOS standard cell data dependent adders. - Robin Perrot; Nadine Azémard; Philippe Maurine (ICECS, 2006)

Circuit sizing method under delay constraint. - Alexandre Verle; A. Landrault; Philippe Maurine; Nadine Azémard (ISCAS, 2006)

Timing analysis in presence of supply voltage and temperature variations. - B. Lasbouygues; Robin Wilson; Nadine Azémard; Philippe Maurine (ISPD, 2006)

Statistical Characterization of Library Timing Performance. - Vincent Migairou; Robin Wilson; Sylvain Engels; Nadine Azémard; Philippe Maurine (PATMOS, 2006)

Formal Evaluation of the Robustness of Dual-Rail Logic Against DPA Attacks. - Alin Razafindraibe; Michel Robert; Philippe Maurine (PATMOS, 2006)

Security evaluation of dual rail logic against DPA attacks. - Alin Razafindraibe; Philippe Maurine; Michel Robert; Marc Renaudin (VLSI-SoC, 2006)

A comprehensive performance macro-modeling of on-chip RC interconnects considering line shielding effects. - Sylvain Engels; Robin Wilson; Nadine Azémard; Philippe Maurine (Integr., 2006)

Logical effort model extension to propagation delay representation. - B. Lasbouygues; Sylvain Engels; Robin Wilson; Philippe Maurine; Nadine Azémard; Daniel Auvergne (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006)

Temperature and voltage aware timing analysis: application to voltage drops. - B. Lasbouygues; Robin Wilson; Nadine Azémard; Philippe Maurine (DATE, 2007)

A Simple Statistical Timing Analysis Flow and Its Application to Timing Margin Evaluation. - Vincent Migairou; Robin Wilson; Sylvain Engels; Zeqin Wu; Nadine Azémard; Philippe Maurine (PATMOS, 2007)

A Model of DPA Syndrome and Its Application to the Identification of Leaking Gates. - Alin Razafindraibe; Philippe Maurine (PATMOS, 2007)

Analysis and Improvement of Dual Rail Logic as a Countermeasure Against DPA. - Alin Razafindraibe; Michel Robert; Philippe Maurine (PATMOS, 2007)

Improvement of dual rail logic as a countermeasure against DPA. - Alin Razafindraibe; Michel Robert; Philippe Maurine (VLSI-SoC, 2007)

Temperature- and Voltage-Aware Timing Analysis. - B. Lasbouygues; Robin Wilson; Nadine Azémard; Philippe Maurine (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

SSTA considering switching process induced correlations. - Zeqin Wu; Philippe Maurine; Nadine Azémard; Gilles R. Ducharme (APCCAS, 2008)

A Novel Dummy Bitline Driver for Read Margin Improvement in an eSRAM. - Michael Yap San Min; Philippe Maurine; Magali Bastian; Michel Robert (DELTA, 2008)

Statistical Sizing of an eSRAM Dummy Bitline Driver for Read Margin Improvement in the Presence of Variability Aspects. - Michael Yap San Min; Philippe Maurine; Magali Bastian; Michel Robert (ISVLSI, 2008)

Setup and Hold Timing Violations Induced by Process Variations, in a Digital Multiplier. - Bettina Rebaud; Marc Belleville; Christian Bernard; Zeqin Wu; Michel Robert; Philippe Maurine; Nadine Azémard (ISVLSI, 2008)

Near-Field Mapping System to Scan in Time Domain the Magnetic Emissions of Integrated Circuits. - Thomas Ordas; Mathieu Lisart; Etienne Sicard; Philippe Maurine; Lionel Torres (PATMOS, 2008)

Triple Rail Logic Robustness against DPA. - Victor Lomné; Thomas Ordas; Philippe Maurine; Lionel Torres; Michel Robert; Rafael Soares; Ney Calazans (ReConFig, 2008)

Evaluating the robustness of secure triple track logic through prototyping. - Rafael Soares; Ney Laert Vilar Calazans; Victor Lomné; Philippe Maurine; Lionel Torres; Michel Robert (SBCCI, 2008)

Editorial. - Nadine Azémard; Philippe Maurine; Johan Vounckx (Integr., 2008)

Evaluation on FPGA of triple rail logic robustness against DPA and DEMA. - Victor Lomné; Philippe Maurine; Lionel Torres; Michel Robert; Rafael Soares; Ney Calazans (DATE, 2009)

Product On-Chip Process Compensation for Low Power and Yield Enhancement. - Nabila Moubdi; Philippe Maurine; Robin Wilson; Nadine Azémard; Vincent Dumettier; Abhishek Bansal 003; Sebastien Barasinski; Alain Tournier; Guy Durieu; David Meyer; Pierre Busson; Sarah Verhaeren; et al. (PATMOS, 2009)

Digital Timing Slack Monitors and Their Specific Insertion Flow for Adaptive Compensation of Variabilities. - Bettina Rebaud; Marc Belleville; Edith Beigné; Christian Bernard; Michel Robert; Philippe Maurine; Nadine Azémard (PATMOS, 2009)

Interpreting SSTA Results with Correlation. - Zeqin Wu; Philippe Maurine; Nadine Azémard; Gilles R. Ducharme (PATMOS, 2009)

Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography. - Amine Dehbaoui; Victor Lomné; Philippe Maurine; Lionel Torres; Michel Robert (VLSI-SoC, 2009)

Timing margin evaluation with a simple statistical timing analysis flow. - Vincent Migairou; Robin Wilson; Sylvain Engels; Zeqin Wu; Nadine Azémard; Philippe Maurine (J. Embed. Comput., 2009)

Differential Power Analysis enhancement with statistical preprocessing. - Victor Lomné; Amine Dehbaoui; Philippe Maurine; Lionel Torres; Michel Robert (DATE, 2010)

Modeling Time Domain Magnetic Emissions of ICs. - Victor Lomné; Philippe Maurine; Lionel Torres; Thomas Ordas; Mathieu Lisart; Jérome Toublanc (PATMOS, 2010)

A GALS pipeline DES architecture to increase robustness against DPA and DEMA attacks. - Rafael Soares; Ney Laert Vilar Calazans; Victor Lomné; Amine Dehbaoui; Philippe Maurine; Lionel Torres (SBCCI, 2010)

Spatial EM jamming: A countermeasure against EM Analysis? - François Poucheret; Lyonel Barthe; Pascal Benoit; Lionel Torres; Philippe Maurine; Michel Robert (VLSI-SoC, 2010)

On-Chip Process Variability Monitoring Flow. - Nabila Moubdi; Philippe Maurine; Robin Wilson; Sylvain Engels; Nadine Azémard; Vincent Dumettier; Pierre Busson (J. Low Power Electron., 2010)

Local and Direct EM Injection of Power Into CMOS Integrated Circuits. - François Poucheret; Karim Tobich; Mathieu Lisart; Laurent Chusseau; Bruno Robisson; Philippe Maurine (FDTC, 2011)

A New Process Characterization Method for FPGAs Based on Electromagnetic Analysis. - Florent Bruguier; Pascal Benoit; Philippe Maurine; Lionel Torres (FPL, 2011)

A Robust Architectural Approach for Cryptographic Algorithms Using GALS Pipelines. - Rafael Iankowski Soares; Ney Laert Vilar Calazans; Fernando Gehm Moraes; Philippe Maurine; Lionel Torres (IEEE Des. Test Comput., 2011)

Spectral Coherence Analysis - First Experimental Results -. - Amine Dehbaoui; Sébastien Tiran; Philippe Maurine; François-Xavier Standaert; Nicolas Veyrat-Charvillon (IACR Cryptol. ePrint Arch., 2011)

Timing slack monitoring under process and environmental variations: Application to a DSP performance optimization. - Bettina Rebaud; Marc Belleville; Edith Beigné; Christian Bernard; Michel Robert; Philippe Maurine; Nadine Azémard (Microelectron. J., 2011)

Local Condition Monitoring in integrated circuits using a set of Kolmogorov-Smirnov tests. - Lionel Vincent; Suzanne Lesecq; Philippe Maurine; Edith Beigné (CCA, 2012)

SCA with Magnitude Squared Coherence. - Sébastien Tiran; Philippe Maurine (CARDIS, 2012)

Contactless Electromagnetic Active Attack on Ring Oscillator Based True Random Number Generator. - Pierre Bayon; Lilian Bossuet; Alain Aubert; Viktor Fischer; François Poucheret; Bruno Robisson; Philippe Maurine (COSADE, 2012)

Embedding statistical tests for on-chip dynamic voltage and temperature monitoring. - Lionel Vincent; Philippe Maurine; Suzanne Lesecq; Edith Beigné (DAC, 2012)

Amplitude demodulation-based EM analysis of different RSA implementations. - Guilherme Perin; Lionel Torres; Pascal Benoit; Philippe Maurine (DATE, 2012)

Techniques for EM Fault Injection: Equipments and Experimental Results. - Philippe Maurine (FDTC, 2012)

Statistical timing characterization. - Zeqin Wu; Philippe Maurine; Nadine Azémard; Gilles R. Ducharme (ISSoC, 2012)

Injection of transient faults using electromagnetic pulses -Practical results on a cryptographic system-. - Amine Dehbaoui; Jean-Max Dutertre; Bruno Robisson; P. Orsatelli; Philippe Maurine; Assia Tria (IACR Cryptol. ePrint Arch., 2012)

Magnitude Squared Coherence based SCA. - Sébastien Tiran; Philippe Maurine (IACR Cryptol. ePrint Arch., 2012)

Secure D flip-flop against side channel attacks. - Bruno Vaquie; Sébastien Tiran; Philippe Maurine (IET Circuits Devices Syst., 2012)

Delay-correlation-aware SSTA based on conditional moments. - Zeqin Wu; Philippe Maurine; Nadine Azémard; Gilles R. Ducharme (Microelectron. J., 2012)

Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence. - Amine Dehbaoui; Victor Lomné; Thomas Ordas; Lionel Torres; Michel Robert; Philippe Maurine (IEEE Trans. Very Large Scale Integr. Syst., 2012)

Practical Analysis of RSA Countermeasures Against Side-Channel Electromagnetic Attacks. - Guilherme Perin; Laurent Imbert; Lionel Torres; Philippe Maurine (CARDIS, 2013)

Electromagnetic Analysis on RSA Algorithm Based on RNS. - Guilherme Perin; Laurent Imbert; Lionel Torres; Philippe Maurine (DSD, 2013)

Voltage Spikes on the Substrate to Obtain Timing Faults. - Karim Tobich; Philippe Maurine; Pierre-Yvan Liardet; Mathieu Lisart; Thomas Ordas (DSD, 2013)

An evaluation of an AES implementation protected against EM analysis. - Paolo Maistri; Sébastien Tiran; Philippe Maurine; Israel Koren; Régis Leveugle (ACM Great Lakes Symposium on VLSI, 2013)

Countermeasures against EM analysis for a secured FPGA-based AES implementation. - Paolo Maistri; Sébastien Tiran; Philippe Maurine; Israel Koren; Régis Leveugle (ReConFig, 2013)

A Frequency Leakage Model and its application to CPA and DPA. - Sébastien Tiran; Sébastien Ordas; Yannick Teglia; Michel Agoyan; Philippe Maurine (IACR Cryptol. ePrint Arch., 2013)

Evidence of a Larger EM-Induced Fault Model. - Sébastien Ordas; Ludovic Guillaume-Sage; Karim Tobich; Jean-Max Dutertre; Philippe Maurine (CARDIS, 2014)

On Adaptive Bandwidth Selection for Efficient MIA. - Mathieu Carbone; Sébastien Tiran; Sébastien Ordas; Michel Agoyan; Yannick Teglia; Gilles R. Ducharme; Philippe Maurine (COSADE, 2014)

Attacking Randomized Exponentiations Using Unsupervised Learning. - Guilherme Perin; Laurent Imbert; Lionel Torres; Philippe Maurine (COSADE, 2014)

Efficiency of a glitch detector against electromagnetic fault injection. - Loïc Zussa; Amine Dehbaoui; Karim Tobich; Jean-Max Dutertre; Philippe Maurine; Ludovic Guillaume-Sage; Jessy Clédière; Assia Tria (DATE, 2014)

A frequency leakage model for SCA. - Sébastien Tiran; Sébastien Ordas; Yannick Teglia; Michel Agoyan; Philippe Maurine (HOST, 2014)

Electromagnetic analysis, deciphering and reverse engineering of integrated circuits (E-MATA HARI). - Laurent Chusseau; Rachid Omarouayache; Jérémy Raoult; Sylvie Jarrix; Philippe Maurine; Karim Tobich; Alexandre Boyer; Bertrand Vrignon; John Shepherd 004; Thanh-Ha Le; Maël Berthier; Lionel Rivière; et al. (VLSI-SoC, 2014)

Electromagnetic analysis and fault injection onto secure circuits. - Paolo Maistri; Régis Leveugle; Lilian Bossuet; Alain Aubert; Viktor Fischer; Bruno Robisson; Nicolas Moro; Philippe Maurine; Jean-Max Dutertre; Mathieu Lisart (VLSI-SoC, 2014)

Analysis Of Variance and CPA in SCA. - Sébastien Tiran; Guillaume Reymond; Jean-Baptiste Rigaud; Driss Aboulkassimi; Benedikt Gierlichs; Mathieu Carbone; Gilles R. Ducharme; Philippe Maurine (IACR Cryptol. ePrint Arch., 2014)

A model of the leakage in the frequency domain and its application to CPA and DPA. - Sébastien Tiran; Sébastien Ordas; Yannick Teglia; Michel Agoyan; Philippe Maurine (J. Cryptogr. Eng., 2014)

Dynamic Variability Monitoring Using Statistical Tests for Energy Efficient Adaptive Architectures. - Lionel Vincent; Edith Beigné; Suzanne Lesecq; Julien Mottin; David Coriat; Philippe Maurine (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Collision for Estimating SCA Measurement Quality and Related Applications. - Ibrahima Diop; Mathieu Carbone; Sébastien Ordas; Yanis Linge; Pierre-Yvan Liardet; Philippe Maurine (CARDIS, 2015)

Collision Based Attacks in Practice. - Ibrahima Diop; Pierre-Yvan Liardet; Yanis Linge; Philippe Maurine (DSD, 2015)

EM Injection: Fault Model and Locality. - Sébastien Ordas; Ludovic Guillaume-Sage; Philippe Maurine (FDTC, 2015)

Interest of MIA in frequency domain? - Mathieu Carbone; Yannick Teglia; Philippe Maurine; Gilles R. Ducharme (CS2@HiPEAC, 2015)

Thoroughly analyzing the use of ring oscillators for on-chip hardware trojan detection. - Maxime Lecomte; Jacques J. A. Fournier; Philippe Maurine (ReConFig, 2015)

Extraction of intrinsic structure for Hardware Trojan detection. - Maxime Lecomte; Jacques Fournier; Philippe Maurine (IACR Cryptol. ePrint Arch., 2015)

Vertical and horizontal correlation attacks on RNS-based exponentiations. - Guilherme Perin; Laurent Imbert; Philippe Maurine; Lionel Torres (J. Cryptogr. Eng., 2015)

A fully-digital EM pulse detector. - David El-Baze; Jean-Baptiste Rigaud; Philippe Maurine (DATE, 2016)

On-chip fingerprinting of IC topology for integrity verification. - Maxime Lecomte; Jacques J. A. Fournier; Philippe Maurine (DATE, 2016)

An Embedded Digital Sensor against EM and BB Fault Injection. - David El-Baze; Jean-Baptiste Rigaud; Philippe Maurine (FDTC, 2016)

Body Biasing Injection Attacks in Practice. - Noemie Beringuier-Boher; Marc Lacruche; David El-Baze; Jean-Max Dutertre; Jean-Baptiste Rigaud; Philippe Maurine (CS2@HiPEAC, 2016)

Granularity and detection capability of an adaptive embedded Hardware Trojan detection system. - Maxime Lecomte; Jacques J. A. Fournier; Philippe Maurine (HOST, 2016)

An EM Fault Injection Susceptibility Criterion and Its Application to the Localization of Hotspots. - Maxime Madau; Michel Agoyan; Philippe Maurine (CARDIS, 2017)

Impacts of Technology Trends on Physical Attacks? - Philippe Maurine; Sylvain Guilley (COSADE, 2017)

Role of Laser-Induced IR Drops in the Occurrence of Faults: Assessment and Simulation. - Raphael Andreoni Camponogara Viera; Jean-Max Dutertre; Rodrigo Possamai Bastos; Philippe Maurine (DSD, 2017)

Importance of IR drops on the modeling of laser-induced transient faults. - Raphael Andreoni Camponogara Viera; Philippe Maurine; Jean-Max Dutertre; Rodrigo Possamai Bastos (SMACD, 2017)

Mutual information analysis: higher-order statistical moments, efficiency and efficacy. - Mathieu Carbone; Yannick Teglia; Gilles R. Ducharme; Philippe Maurine (J. Cryptogr. Eng., 2017)

Electromagnetic fault injection: the curse of flip-flops. - Sébastien Ordas; Ludovic Guillaume-Sage; Philippe Maurine (J. Cryptogr. Eng., 2017)

Method for evaluation of transient-fault detection techniques. - Raphael Andreoni Camponogara Viera; Rodrigo Possamai Bastos; Jean-Max Dutertre; Philippe Maurine; Rodrigo Iga Jadue (Microelectron. Reliab., 2017)

An On-Chip Technique to Detect Hardware Trojans and Assist Counterfeit Identification. - Maxime Lecomte; Jacques Fournier; Philippe Maurine (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Electromagnetic Activity vs. Logical Activity: Near Field Scans for Reverse Engineering. - Marc Lacruche; Philippe Maurine (CARDIS, 2018)

Thermal Scans for Detecting Hardware Trojans. - Maxime Cozzi; Jean-Marc Gallière; Philippe Maurine (COSADE, 2018)

Exploiting Phase Information in Thermal Scans for Stealthy Trojan Detection. - Maxime Cozzi; Jean-Marc Gallière; Philippe Maurine (DSD, 2018)

The Impact of Pulsed Electromagnetic Fault Injection on True Random Number Generators. - Maxime Madau; Michel Agoyan; Josep Balasch; Milos Grujic; Patrick Haddad; Philippe Maurine; Vladimir Rozic; Dave Singelée; Bohan Yang 001; Ingrid Verbauwhede (FDTC, 2018)

Standard CAD Tool-Based Method for Simulation of Laser-Induced Faults in Large-Scale Circuits. - Raphael Andreoni Camponogara Viera; Jean-Max Dutertre; Philippe Maurine; Rodrigo Possamai Bastos (ISPD, 2018)

Estimating the Signal-to-Noise Ratio Under Repeated Sampling of the Same Centered Signal: Applications to Side-Channel Attacks on a Cryptoprocessor. - Gilles R. Ducharme; Philippe Maurine (IEEE Trans. Inf. Theory, 2018)

Breaking Mobile Firmware Encryption through Near-Field Side-Channel Analysis. - Aurélien Vasselle; Philippe Maurine; Maxime Cozzi (ASHES@CCS, 2019)

Electromagnetic Fault Injection : How Faults Occur. - Mathieu Dumont; Mathieu Lisart; Philippe Maurine (FDTC, 2019)

From theory to practice: horizontal attacks on protected implementations of modular exponentiations. - Ibrahima Diop; Yanis Linge; Thomas Ordas; Pierre-Yvan Liardet; Philippe Maurine (J. Cryptogr. Eng., 2019)

Leakage Assessment Through Neural Estimation of the Mutual Information. - Valence Cristiani; Maxime Lecomte; Philippe Maurine (ACNS Workshops, 2020)

Finding EM leakages at design stage: a simulation methodology. - Davide Poggi; Philippe Maurine; Thomas Ordas; Alexandre Sarafianos; Jérémy Raoult (IACR Cryptol. ePrint Arch., 2020)

A Simple Protocol to Compare EMFI Platforms. - Julien Toulemont; N. Ouldei-Tebina; Jean Marc Gallière; Pascal Nouet; E. Bourbao; Philippe Maurine (IACR Cryptol. ePrint Arch., 2020)

Simulation and Experimental Demonstration of the Importance of IR-Drops During Laser Fault Injection. - Raphael Andreoni Camponogara Viera; Philippe Maurine; Jean-Max Dutertre; Rodrigo Possamai Bastos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2020)

Protecting Secure ICs Against Side-Channel Attacks by Identifying and Quantifying Potential EM and Leakage Hotspots at Simulation Stage. - Davide Poggi; Philippe Maurine; Thomas Ordas; Alexandre Sarafianos (COSADE, 2021)

Iterative Method for Performance Prediction Improvement of Integrated Circuits. - Gwenael Chaillou; Philippe Maurine; Jean-Marc Gallière; Nadine Azémard (DCIS, 2021)

On the scaling of EMFI probes. - Julien Toulemont; Geoffrey Chancel; Jean Marc Gallière; Frédérick Mailly; Pascal Nouet; Philippe Maurine (FDTC, 2021)

Exploring flexible and 3D printing technologies for the design of high spatial resolution EM probes. - Julien Toulemont; Frédérick Mailly; Philippe Maurine; Pascal Nouet (NEWCAS, 2021)

Spatial Dependency Analysis to Extract Information from Side-Channel Mixtures. - Aurélien Vasselle; Hugues Thiebeauld; Philippe Maurine (IACR Cryptol. ePrint Arch., 2021)

Modeling and Simulating Electromagnetic Fault Injection. - Mathieu Dumont; Mathieu Lisart; Philippe Maurine (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Body Biasing Injection: To Thin or Not to Thin the Substrate? - Geoffrey Chancel; Jean Marc Gallière; Philippe Maurine (COSADE, 2022)

Body Biasing Injection: Impact of substrate types on the induced disturbancesƒ. - Geoffrey Chancel; Jean Marc Gallière; Philippe Maurine (FDTC, 2022)

Fit the Joint Moments: How to Attack Any Masking Scheme. - Valence Cristiani; Maxime Lecomte; Thomas Hiscock; Philippe Maurine (IEEE Access, 2022)

Fit The Joint Moments. - Valence Cristiani; Maxime Lecomte; Thomas Hiscock; Philippe Maurine (IACR Cryptol. ePrint Arch., 2022)

The EVIL Machine: Encode, Visualize and Interpret the Leakage. - Valence Cristiani; Maxime Lecomte; Philippe Maurine (IACR Cryptol. ePrint Arch., 2022)

Checking Robustness Against EM Side-Channel Attacks Prior to Manufacturing. - Davide Poggi; Thomas Ordas; Alexandre Sarafianos; Philippe Maurine (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)

Bernoulli at the Root of Horizontal Side Channel Attacks. - Gauthier Cler; Sébastien Ordas; Philippe Maurine (CARDIS, 2023)

A better practice for Body Biasing Injection. - Geoffrey Chancel; Jean-Marc Gallière; Philippe Maurine (FDTC, 2023)

(Adversarial) Electromagnetic Disturbance in the Industry. - Arthur Beckers; Sylvain Guilley; Philippe Maurine; Colin O'Flynn; Stjepan Picek (IEEE Trans. Computers, 2023)

Revisiting Mutual Information Analysis: Multidimensionality, Neural Estimation and Optimality Proofs. - Valence Cristiani; Maxime Lecomte; Philippe Maurine (J. Cryptol., 2023)

Spatial dependency analysis to extract information from side-channel mixtures: extended version. - Aurélien Vasselle; Hugues Thiebeauld; Philippe Maurine (J. Cryptogr. Eng., 2023)

Butterfly probes: estimating the derivative of the magnetic flux. - Anselme Mouette; Julien Toulemont; Jérémy Raoult; Philippe Maurine (EMC Compo, 2024)

Towards package opening detection at power-up by monitoring thermal dissipation. - Julien Toulemont; Geoffrey Chancel; Frédérick Mailly; Philippe Maurine; Pascal Nouet (IACR Cryptol. ePrint Arch., 2024)

PLL Over-Clocking Through Repeated Fault Injections. - Louis Dubois; Philippe Maurine (IOLTS, 2025)

Body Bias Injection on the FLASH Memory Accelerator of a 32-Bit Microcontroller. - Ziling Liao; Florent Bruguier; Philippe Maurine (IOLTS, 2025)