An adaptive self-scheduling loop scheduler. - Joshua Dennis Booth; Phillip Allen Lane (Concurr. Comput. Pract. Exp., 2022)

The AMD Rome Memory Barrier. - Phillip Allen Lane; Jessica Lobrano (CoRR, 2022)

Heterogeneous sparse matrix-vector multiplication via compressed sparse row format. - Phillip Allen Lane; Joshua Dennis Booth (Parallel Comput., 2023)

A NUMA-Aware Version of an Adaptive Self-Scheduling Loop Scheduler. - Joshua Dennis Booth; Phillip Allen Lane (ACM Trans. Archit. Code Optim., 2024)