VHDL High Level Modelling and Implementation of Fuzzy Systems. - Angel Barriga; Santiago Sánchez-Solano; Piedad Brox Jiménez; Alejandro Cabrera; Iluminada Baturone (WILF, 2003)

Hardware/software codesign of configurable fuzzy control systems. - Alejandro Cabrera Sarmiento; Santiago Sánchez-Solano; Piedad Brox Jiménez; Angel Barriga; Raouf Senhadji (Appl. Soft Comput., 2004)

Progressive scan conversion based on edge-dependent interpolation using fuzzy logic. - Piedad Brox; Iluminada Baturone; Santiago Sánchez-Solano (EUSFLAT Conf., 2005)

Fuzzy Logic Activities at the Microelectronics Institute of Seville. - Angel Barriga; Santiago Sánchez-Solano; Iluminada Baturone; Francisco Jose Moreno-Velo; Piedad Brox Jiménez; Federico Montesino-Pouzols; Nashaat M. Hussein; María Brox; Andrés Gersnoviez (WIRN/NAIS, 2005)

Fuzzy Motion Adaptive Algorithm for Video De-interlacing. - Piedad Brox; Iluminada Baturone; Santiago Sánchez-Solano; Julio Gutiérrez-Ríos; Felipe Fernández-Hernández (KES (2), 2006)

Modelling and implementation of fuzzy systems based on VHDL. - Angel Barriga; Santiago Sánchez-Solano; Piedad Brox Jiménez; Alejandro Cabrera; Iluminada Baturone (Int. J. Approx. Reason., 2006)

Using Xfuzzy Environment for the Whole Design of Fuzzy Systems. - Iluminada Baturone; Francisco Jose Moreno-Velo; Santiago Sánchez-Solano; Angel Barriga; Piedad Brox Jiménez; Andrés Gersnoviez; María Brox (FUZZ-IEEE, 2007)

A fuzzy edge-dependent motion adaptive algorithm for de-interlacing. - Piedad Brox; Iluminada Baturone; Santiago Sánchez-Solano; Julio Gutiérrez-Ríos; Felipe Fernández-Hernández (Fuzzy Sets Syst., 2007)

Local Picture-repetition Mode Detector for Video De-interlacing. - Piedad Brox; Leon Woestenberg; Gerard de Haan (IEEE Trans. Consumer Electron., 2007)

Fuzzy Motion-Adaptive Interpolation With Picture Repetition Detection for Deinterlacing. - Piedad Brox; Iluminada Baturone; Santiago Sánchez-Solano (IEEE Trans. Instrum. Meas., 2009)

Fuzzy Logic-Based Algorithms for Video De-Interlacing - Piedad Brox Jiménez; Iluminada Baturone; Santiago Sánchez-Solano (Springer, 2010)

Tuning of a hierarchical fuzzy system for video de-interlacing. - Piedad Brox Jiménez; Iluminada Baturone; Santiago Sánchez-Solano (FUZZ-IEEE, 2010)

Circuit implementation of piecewise-affine functions based on lattice representation. - Macarena C. Martínez-Rodríguez; Iluminada Baturone; Piedad Brox (ECCTD, 2011)

Design methodology for FPGA implementation of lattice piecewise-affine functions. - Macarena C. Martínez-Rodríguez; Iluminada Baturone; Piedad Brox (FPT, 2011)

Fuzzy motion adaptive algorithm and its hardware implementation for video de-interlacing. - Julio Gutiérrez-Ríos; Piedad Brox; Felipe Fernández-Hernández; Iluminada Baturone; Santiago Sánchez-Solano (Appl. Soft Comput., 2011)

Soft Computing Techniques for Video De-Interlacing. - Piedad Brox Jiménez; Iluminada Baturone; Santiago Sánchez-Solano (IEEE J. Sel. Top. Signal Process., 2011)

Real-time FPGA connected component labeling system. - Elisa Calvo-Gallego; Alejandro Cabrera Aldaya; Piedad Brox; Santiago Sánchez-Solano (ICECS, 2012)

Reducing bit flipping problems in SRAM physical unclonable functions for chip identification. - Susana Eiroa; Javier Castro-Ramirez; Macarena Cristina Martínez-Rodríguez; Erica Tena; Piedad Brox; Iluminada Baturone (ICECS, 2012)

ASIC-in-the-loop methodology for verification of piecewise affine controllers. - Macarena C. Martínez-Rodríguez; Piedad Brox; Javier Castro-Ramirez; Erica Tena; Antonio J. Acosta 001; Iluminada Baturone (ICECS, 2012)

A Fuzzy System for Background Modeling in Video Sequences. - Elisa Calvo-Gallego; Piedad Brox; Santiago Sánchez-Solano (WILF, 2013)

A Programmable and Configurable ASIC to Generate Piecewise-Affine Functions Defined Over General Partitions. - Piedad Brox; Javier Castro-Ramirez; Macarena C. Martínez-Rodríguez; Erica Tena; Carlos Jesús Jiménez-Fernández; Iluminada Baturone; Antonio J. Acosta 001 (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

CAD Tools for Hardware Implementation of Embedded Fuzzy Systems on FPGAs. - María Brox; Santiago Sánchez-Solano; Ernesto del Toro; Piedad Brox; Francisco Jose Moreno-Velo (IEEE Trans. Ind. Informatics, 2013)

Model-Based Design Methodology for Rapid Development of Fuzzy Controllers on FPGAs. - Santiago Sánchez-Solano; María Brox; Ernesto del Toro; Piedad Brox; Iluminada Baturone (IEEE Trans. Ind. Informatics, 2013)

Dedicated hardware IP module for extracting singular points from fingerprints. - Macarena C. Martínez-Rodríguez; Rosario Arjona; Piedad Brox Jiménez; Iluminada Baturone (ICECS, 2014)

Fuzzy logic-based embedded system for video de-interlacing. - Piedad Brox; Iluminada Baturone; Santiago Sánchez-Solano (Appl. Soft Comput., 2014)

Edge-adaptive spatial video de-interlacing algorithms based on fuzzy logic. - Piedad Brox Jiménez; Iluminada Baturone; Santiago Sánchez-Solano; Julio Gutiérrez-Ríos (IEEE Trans. Consumer Electron., 2014)

Hardware implementation of a background substraction algorithm in FPGA-based platforms. - Elisa Calvo-Gallego; Santiago Sánchez-Solano; Piedad Brox Jiménez (ICIT, 2015)

Programmable ASICs for model predictive control. - Macarena C. Martínez-Rodríguez; Piedad Brox; Erica Tena; Antonio J. Acosta 001; Iluminada Baturone (ICIT, 2015)

Dedicated hardware IP module for fingerprint recognition. - Macarena C. Martínez-Rodríguez; Rosario Arjona; Piedad Brox; Iluminada Baturone (ISCE, 2015)

Digital VLSI Implementation of Piecewise-Affine Controllers Based on Lattice Approach. - Macarena Cristina Martínez-Rodríguez; Piedad Brox; Iluminada Baturone (IEEE Trans. Control. Syst. Technol., 2015)

Application specific integrated circuit solution for multi-input multi-output piecewise-affine functions. - Piedad Brox; Macarena C. Martínez-Rodríguez; Erica Tena-Sánchez; Iluminada Baturone; Antonio J. Acosta 001 (Int. J. Circuit Theory Appl., 2016)

Low-cost dedicated hardware IP modules for background subtraction in embedded vision systems. - Elisa Calvo-Gallego; Piedad Brox; Santiago Sánchez-Solano (J. Real Time Image Process., 2016)

CMOS digital design of a trusted virtual sensor. - Macarena C. Martínez-Rodríguez; Miguel Ángel Prada-Delgado; Piedad Brox; Iluminada Baturone (NORCAS, 2017)

A comparative analysis of VLSI trusted virtual sensors. - Macarena C. Martínez-Rodríguez; Piedad Brox; Iluminada Baturone (Microprocess. Microsystems, 2018)

VLSI Design of Trusted Virtual Sensors. - Macarena C. Martínez-Rodríguez; Miguel A. Prada-Delgado; Piedad Brox; Iluminada Baturone (Sensors, 2018)

Accelerating the Development of NTRU Algorithm on Embedded Systems. - Eros Camacho-Ruiz; Macarena C. Martínez-Rodríguez; Santiago Sánchez-Solano; Piedad Brox (DCIS, 2020)

Improving the reliability of SRAM-based PUFs in the presence of aging. - Pablo Saraza-Canflanca; Héctor Carrasco-Lopez; Piedad Brox; Rafael Castro-López; Elisenda Roca; Francisco V. Fernández 001 (DTIS, 2020)

Design Flow to Evaluate the Performance of Ring Oscillator PUFs on FPGAs. - Macarena C. Martínez-Rodríguez; Eros Camacho-Ruiz; Santiago Sánchez-Solano; Piedad Brox (DCIS, 2021)

Timing-Optimized Hardware Implementation to Accelerate Polynomial Multiplication in the NTRU Algorithm. - Eros Camacho-Ruiz; Santiago Sánchez-Solano; Piedad Brox; Macarena C. Martínez-Rodríguez (ACM J. Emerg. Technol. Comput. Syst., 2021)

True Random Number Generator based on RO-PUF. - Luis F. Rojas-Muñoz; Santiago Sánchez-Solano; Macarena C. Martínez-Rodríguez; Piedad Brox (DCIS, 2022)

A novel Physical Unclonable Function using RTN. - Eros Camacho-Ruiz; Rafael Castro-López; Elisenda Roca; Piedad Brox; Francisco V. Fernández 001 (ISCAS, 2022)

Efficient RO-PUF for Generation of Identifiers and Keys in Resource-Constrained Embedded Systems. - Macarena C. Martínez-Rodríguez; Luis F. Rojas-Muñoz; Eros Camacho-Ruiz; Santiago Sánchez-Solano; Piedad Brox (Cryptogr., 2022)

A DRV-based bit selection method for SRAM PUF key generation and its impact on ECCs. - Andrés Santana-Andreo; Pablo Saraza-Canflanca; Héctor Carrasco-Lopez; Piedad Brox; Rafael Castro-López; Elisenda Roca; Francisco V. Fernández 001 (Integr., 2022)

Multi-Unit Serial Polynomial Multiplier to Accelerate NTRU-Based Cryptographic Schemes in IoT Embedded Systems. - Santiago Sánchez-Solano; Eros Camacho-Ruiz; Macarena C. Martínez-Rodríguez; Piedad Brox (Sensors, 2022)

A Simple Power Analysis of an FPGA implementation of a polynomial multiplier for the NTRU cryptosystem. - Eros Camacho-Ruiz; Santiago Sánchez-Solano; Macarena C. Martínez-Rodríguez; Erica Tena-Sánchez; Piedad Brox (DCIS, 2023)

HW/SW implementation of RSA digital signature on a RISC-V-based System-on-Chip. - Apurba Karmakar; Santiago Sánchez-Solano; Macarena C. Martínez-Rodríguez; Piedad Brox (DCIS, 2023)

A complete SHA-3 hardware library based on a high efficiency Keccak design. - Eros Camacho-Ruiz; Santiago Sánchez-Solano; Macarena C. Martínez-Rodríguez; Piedad Brox (NorCAS, 2023)

On-Line Evaluation and Monitoring of Security Features of an RO-Based PUF/TRNG for IoT Devices. - Luis F. Rojas-Muñoz; Santiago Sánchez-Solano; Macarena C. Martínez-Rodríguez; Piedad Brox (Sensors, 2023)

Timing-Attack-Resistant Acceleration of NTRU Round 3 Encryption on Resource-Constrained Embedded Systems. - Eros Camacho-Ruiz; Macarena C. Martínez-Rodríguez; Santiago Sánchez-Solano; Piedad Brox (Cryptogr., 2023)

Cryptographic Security Through a Hardware Root of Trust. - Luis F. Rojas-Muñoz; Santiago Sánchez-Solano; Macarena C. Martínez-Rodríguez; Eros Camacho-Ruiz; Pablo Navarro-Torrero; Apurba Karmakar; Carlos Fernández García; Erica Tena-Sánchez; Francisco Eugenio Potestad-Ordóñez; Alejandro Casado-Galán; Pau Ortega-Castro; Antonio Acosta-Jiménez; et al. (ARC, 2024)

Design of a Karatsuba Multiplier to Accelerate Digital Signature Schemes on Embedded Systems. - Pablo Navarro-Torrero; Eros Camacho-Ruiz; Macarena C. Martínez-Rodríguez; Piedad Brox (NorCAS, 2024)

VLSI integration of a RO-based PUF into a 65 nm technology. - Pau Ortega-Castro; Felipe Rojas-Muñoz; José Miguel Mora-Gutiérrez; Piedad Brox; Macarena C. Martínez-Rodríguez (NorCAS, 2024)

Hardware-Efficient Configurable Ring-Oscillator-Based Physical Unclonable Function/True Random Number Generator Module for Secure Key Management. - Santiago Sánchez-Solano; Luis F. Rojas-Muñoz; Macarena C. Martínez-Rodríguez; Piedad Brox (Sensors, 2024)

A Side-Channel Protected and High-Performance Hardware Implementation for EdDSA25519. - Pablo Navarro-Torrero; Eros Camacho-Ruiz; Macarena C. Martínez-Rodríguez; Piedad Brox Jiménez (IEEE Access, 2025)