An example of a new VLSI design style based on systolic macrocells: A high-speed single-chip transversal filter for signal processing applications. - Roberto Roncella; Roberto Saletti; Pierangelo Terreni (Eur. Trans. Telecommun., 1990)

ASIC-based acoustic echo-canceller board for VME bus. - Franco Maloberti; Guido Torelli; Claudio Panini; Mauro Troiani; Roberto Roncella; Pierangelo Terreni; Cristiano Toncelli; Roberto Saletti (Eur. Trans. Telecommun., 1992)

Single-chip adaptive FIR filter for acoustic echo canceller board. - Roberto Roncella; Roberto Saletti; Pierangelo Terreni; Cristiano Toncelli (Signal Process., 1992)

Conditions for the existence and uniqueness of DC solutions of networks containing nonlinear opamps with ideal model. - Maurizio Ciampa; Pierangelo Terreni; Mario Poletti (ISCAS, 1993)

Linear networks and systems polynomially depending on parameters: Behaviour of the solutions for large and small values. - Maurizio Ciampa; Pierangelo Terreni; Mario Poletti (ISCAS, 1993)

Linear networks and systems depending polynomially on parameters: Stability for large values subject to tolerance errors. - Maurizio Ciampa; Mario Poletti; Pierangelo Terreni (Int. J. Circuit Theory Appl., 1993)

70-MHz 2- mu m CMOS bit-level systolic array median filter. - Roberto Roncella; Roberto Saletti; Pierangelo Terreni (IEEE J. Solid State Circuits, 1993)

On the Realisation of Delay-Insensitive Asynchronous Circuits with CMOS Ternary Logic. - Riccardo Mariani; Roberto Roncella; Roberto Saletti; Pierangelo Terreni (ASYNC, 1997)

A single-chip 1, 200 sinusoid real-time generator for additive synthesis of musical signals. - Fernando De Bernardinis; Roberto Roncella; Roberto Saletti; Pierangelo Terreni; Graziano Bertini (ICASSP, 1997)

Useful Application of CMOS Ternary Logic to the Realisation of Asynchronous Circuits. - Riccardo Mariani; Roberto Roncella; Roberto Saletti; Pierangelo Terreni (ISMVL, 1997)

A pyramid vector quantizer chip for HDTV applications. - Fabio Bellifemine; Romualdo Picco; Roberto Roncella; Roberto Saletti; Pierangelo Terreni (Eur. Trans. Telecommun., 1997)

Multihit multichannel time-to-digital converter with ±1% differential nonlinearity and near optimal time resolution. - Pietro Andreani; Franco Bigongiari; Roberto Roncella; Roberto Saletti; Pierangelo Terreni; Adriano Bigongiari; Maurizio Lippi (IEEE J. Solid State Circuits, 1998)

An efficient VLSI architecture for real-time additive synthesis of musical signals. - Fernando De Bernardinis; Roberto Roncella; Roberto Saletti; Pierangelo Terreni; Graziano Bertini (IEEE Trans. Very Large Scale Integr. Syst., 1999)

VLSI design of a routing switch for the SpaceWire serial link standard. - Luca Fanucci; Alessandro Renieri; Pierangelo Terreni (ICECS, 2002)

FAST: FFT ASIC automated synthesis. - Luca Fanucci; Massimiliano Forliti; Pierangelo Terreni (Integr., 2002)

A QoS Internet Protocol Scheduler on the IXP1200 Network Platform. - Fernando De Bernardinis; Luca Fanucci; Tommaso Ramacciotti; Pierangelo Terreni (IWSOC, 2003)

Adaptive algorithm for fast motion estimation in H.264/MPEG-4 AVC. - Sergio Saponara; Massimiliano Melani; Luca Fanucci; Pierangelo Terreni (EUSIPCO, 2004)

Context-Aware Algorithmic/Architectural Solutions for Real-time Embedded Video Systems. - Sergio Saponara; Luca Fanucci; Pierangelo Terreni (WISES, 2004)

Design of a Low-Power VLSI Macrocell for Nonlinear Adaptive Video Noise Reduction. - Sergio Saponara; Luca Fanucci; Pierangelo Terreni (EURASIP J. Adv. Signal Process., 2004)

Enriching an analog platform for analog-to-digital converter design. - Fernando De Bernardinis; Pierluigi Nuzzo 001; Pierangelo Terreni; Alberto L. Sangiovanni-Vincentelli (ISCAS (2), 2005)

Self-Adaptive Algorithmic/Architectural Design for Real-Time, Low-Power Video Systems. - Luca Fanucci; Sergio Saponara; Massimiliano Melani; Pierangelo Terreni (IEICE Trans. Inf. Syst., 2005)

A 10.6mW/0.8pJ power-scalable 1GS/s 4b ADC in 0.18mum CMOS with 5.8GHz ERBW. - Pierluigi Nuzzo 001; Geert Van der Plas; Fernando De Bernardinis; Liesbet Van der Perre; Bert Gyselinckx; Pierangelo Terreni (DAC, 2006)

Mixed-signal design of a digital input power amplifier for automotive audio applications. - Sergio Saponara; Pierangelo Terreni (DATE Designers' Forum, 2006)

Oversampled and Noise-Shaped Pulse-Width Modulator for High-Fidelity Digital Audio Amplifier. - Sergio Saponara; Luca Fanucci; Pierangelo Terreni (ICECS, 2006)

Automatic Generation of Low-Complexity FFT/IFFT Cores for Multi-Band OFDM Systems. - Nicola E. L'Insalata; Sergio Saponara; Luca Fanucci; Pierangelo Terreni (DSD, 2007)

Architectural-Level Power Optimization of Microcontroller Cores in Embedded Systems. - Sergio Saponara; Luca Fanucci; Pierangelo Terreni (IEEE Trans. Ind. Electron., 2007)

Automatic Synthesis of Cost Effective FFT/IFFT Cores for VLSI OFDM Systems. - Nicola E. L'Insalata; Sergio Saponara; Luca Fanucci; Pierangelo Terreni (IEICE Trans. Electron., 2008)

Noise Analysis of Regenerative Comparators for Reconfigurable ADC Architectures. - Pierluigi Nuzzo 001; Fernando De Bernardinis; Pierangelo Terreni; Geert Van der Plas (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

Sensor modeling and fusion algorithms for NOx measures towards zero emissions vehicles. - Antonio Giampà; Esa Petri; Sergio Saponara; Pierangelo Terreni (ROSE, 2009)

Sensor modeling and data fusion for a safety warning system in hydrogen-based vehicles. - Sergio Saponara; Alessandro Forconi; Pierangelo Terreni (ROSE, 2009)

Smart transducer interface in embedded systems for networked sensors based on the emerging IEEE 1451 Standard: H2 Detection Case Study. - Sergio Saponara; Esa Petri; Luca Fanucci; Pierangelo Terreni (WISES, 2009)

Mixed-Signal Architectures for High-Efficiency and Low-Distortion Digital Audio Processing and Power Amplification. - Sergio Saponara; Pierangelo Terreni (EURASIP J. Embed. Syst., 2010)

Sensor Modeling, Low-Complexity Fusion Algorithms, and Mixed-Signal IC Prototyping for Gas Measures in Low-Emission Vehicles. - Sergio Saponara; Esa Petri; Luca Fanucci; Pierangelo Terreni (IEEE Trans. Instrum. Meas., 2011)

Hardware building blocks of a hierarchical battery management system for a fuel cell HEV. - Federico Baronti; Gabriele Fantechi; Roberto Roncella; Roberto Saletti; Pierangelo Terreni (IECON, 2012)

A Real-Time FPGA-based Solution for Binary Image Thinning. - Daniele Davalle; Berardino Carnevale; Sergio Saponara; Luca Fanucci; Pierangelo Terreni (ApplePies, 2014)