A 28 nm 2 GS/s 5-b single-channel SAR ADC with gm-boosted StrongARM comparator. - Pierluigi Cenci; Muhammed Bolatkale; Robert Rutten; Gerard Lassche; Kofi A. A. Makinwa; Lucien J. Breems (ESSCIRC, 2017)

A 2 GHz 0.98 mW 4-bit SAR-Based Quantizer with ELD Compensation in an UWB CT ΣΔ Modulator. - Meiyi Zhou; Marios Neofytou; Muhammed Bolatkale; Qilong Liu; Chenming Zhang; Pierluigi Cenci; Georgi I. Radulov; Peter G. M. Baltus; Lucien J. Breems (ISCAS, 2018)

A 3.2mW SAR-assisted CTΔ∑ ADC with 77.5dB SNDR and 40MHz BW in 28nm CMOS. - Pierluigi Cenci; Muhammed Bolatkale; Robert Rutten; M. Ganzerli; Gerard Lassche; Kofi A. A. Makinwa; Lucien J. Breems (VLSI Circuits, 2019)

A 2GHz 2-bit Continuous-Time Delta Sigma ADC with 2GHz chopper achieving 12nV/sqrt(Hz) 1/f noise at 153kHz and -104.7dBc THD in 30MHz BW. - Pierluigi Cenci; Hans Brekelmans; Shagun Bajoria; Marcello Ganzerli; Bernard Burdiek; Robert Rutten; Yihan Gao; Muhammed Bolatkale; Paul Swinkels; Lucien J. Breems (ESSCIRC, 2022)