A Fully Qualified Analog Design Flow for Non Volatile Memories Technologies. - Pierluigi Daglio; M. Araldi; Michele Morbarigazzi; Carlo Roma (ISQED, 2001)

A Fully Qualified Top-Down and Bottom-Up Mixed-Signal Design Flow for Non Volatile Memories Technologies. - Pierluigi Daglio; Carlo Roma (DATE, 2003)

Building the Hierarchy from a Flat Netlist for a Fast and Accurate Post-Layout Simulation with Parasitic Components. - Pierluigi Daglio; David Iezzi; Danilo Rimondi; Carlo Roma; Salvatore Santapa (DATE, 2004)

How Circuit Analysis and Yield Optimization Can Be Used To Detect Circuit Limitations Before Silicon Results. - Carlo Roma; Pierluigi Daglio; Guido De Sandre; Marco Pasotti; Marco Poles (ISQED, 2005)

A complete and fully qualified design flow for verification of mixed-signal SoC with embedded flash memories. - Pierluigi Daglio (DATE Designers' Forum, 2006)