Bounds on Signature Analysis Aliasing for Random Testing. - Nirmal R. Saxena; Piero Franco; Edward J. McCluskey (FTCS, 1991)

Delay Testing of Digital Circuits by Output Waveform Analysis. - Piero Franco; Edward J. McCluskey (ITC, 1991)

Refined Bounds on Signature Analysis Aliasing for Random Testing. - Nirmal R. Saxena; Piero Franco; Edward J. McCluskey (ITC, 1991)

Simple Bounds on Serial Signature Analysis Aliasing for Random Testing. - Nirmal R. Saxena; Piero Franco; Edward J. McCluskey (IEEE Trans. Computers, 1992)

On-line delay testing of digital circuits. - Piero Franco; Edward J. McCluskey (VTS, 1994)

Three-pattern tests for delay faults. - Piero Franco; Edward J. McCluskey (VTS, 1994)

An Experimental Chip to Evaluate Test Techniques: Chip and Experiment Design. - Piero Franco; William D. Farwell; Robert L. Stokes; Edward J. McCluskey (ITC, 1995)

An Experimental Chip to Evaluate Test Techniques: Experiment Results. - Siyad C. Ma; Piero Franco; Edward J. McCluskey (ITC, 1995)

Analysis and Detection of Timing Failures in an Experimental Test Chip. - Piero Franco; Siyad C. Ma; Jonathan Chang; Yi-Chin Chu; Sanjay Wattal; Edward J. McCluskey; Robert L. Stokes; William D. Farwell (ITC, 1996)