NAND flash testing: A preliminary study on actual defects. - Pierre-Didier Mauroux; Arnaud Virazel; Alberto Bosio; Luigi Dilillo; Patrick Girard 001; Serge Pravossoudovitch; Benoît Godard (ITC, 2009)

A two-layer SPICE model of the ATMEL TSTACTM eFlash memory technology for defect injection and faulty behavior prediction. - Pierre-Didier Mauroux; Arnaud Virazel; Alberto Bosio; Luigi Dilillo; Patrick Girard 001; Serge Pravossoudovitch; Benoît Godard; Gilles Festes; Laurent Vachez (ETS, 2010)

On using a SPICE-like TSTAC™ eFlash model for design and test. - Pierre-Didier Mauroux; Arnaud Virazel; Alberto Bosio; Luigi Dilillo; Patrick Girard 001; Serge Pravossoudovitch; Benoît Godard; Gilles Festes; Laurent Vachez (DDECS, 2011)

Analysis and Fault Modeling of Actual Resistive Defects in ATMEL TSTACTM eFlash Memories. - Pierre-Didier Mauroux; Arnaud Virazel; Alberto Bosio; Luigi Dilillo; Patrick Girard 001; Serge Pravossoudovitch; Benoît Godard; Gilles Festes; Laurent Vachez (J. Electron. Test., 2012)