A MPSoC Prototyping Platform for Flexible Radio Applications. - Damien Hedde; Pierre-Henri Horrein; Frédéric Pétrot; Robin Rolland; Franck Rousseau (DSD, 2009)

An Environment for (re)configuration and Execution Managenment of Flexible Radio Platforms. - Pierre-Henri Horrein; Christine Hennebert; Frédéric Pétrot (DSD, 2011)

HCM: An abstraction layer for seamless programming of DPR FPGA. - Yan Xu; Olivier Muller; Pierre-Henri Horrein; Frédéric Pétrot (FPL, 2012)

Integration of GPU Computing in a Software Radio Environment. - Pierre-Henri Horrein; Christine Hennebert; Frédéric Pétrot (J. Signal Process. Syst., 2012)

Architectures logicielles pour la radio flexible : intégration d'unités de calcul hétérogènes. (Software design for flexible radio : integration of heterogeneous computing units). - Pierre-Henri Horrein (2012)

An environment for (re)configuration and execution management of heterogeneous flexible radio platforms. - Pierre-Henri Horrein; Christine Hennebert; Frédéric Pétrot (Microprocess. Microsystems, 2013)

Energy-efficient FPGA implementation for binomial option pricing using OpenCL. - Valentin Mena Morales; Pierre-Henri Horrein; Amer Baghdadi; Erik Hochapfel; Sandrine Vaton (DATE, 2014)

UWB-IR digital baseband architecture for IEEE 802.15.6 wireless BAN. - Houcine Chougrani; Jean Schwoerer; Pierre-Henri Horrein; Amer Baghdadi; Francois Dehmas (ICECS, 2014)

Caasper: providing accessible FPGA-acceleration over the network. - Valentin Mena Morales; Yahia Brakni; Pierre-Henri Horrein; Amer Baghdadi (RSP, 2015)

Ouessant: Flexible integration of dedicated coprocessors in Systems on Chip. - Pierre-Henri Horrein; Philip-Dylan Gleonec; Erwan Libessart; André Lalevee; Matthieu Arzel (DATE, 2016)

AutoReloc: Automated Design Flow for Bitstream Relocation on Xilinx FPGAs. - André Lalevee; Pierre-Henri Horrein; Matthieu Arzel; Michael Hübner 001; Sandrine Vaton (DSD, 2016)

Ouessant: Microcontroller approach for flexible accelerator integration and control in System-on-Chip. - Pierre-Henri Horrein; Benoit Porteboeuf; André Lalevee (FPL, 2016)

Massively parallel implementation of sparse message retrieval algorithms in Clustered Clique Networks. - Philippe Tigreat; Pierre-Henri Horrein; Vincent Gripon (HPCS, 2016)

Combining FPGAs and processors for high-throughput forensics IEEE CNS 17 poster. - Franck Cornevaux-Juignet; Matthieu Arzel; Pierre-Henri Horrein; Tristan Groleat; Christian Person (CNS, 2017)

Open-source flexible packet parser for high data rate agile network probe. - Franck Cornevaux-Juignet; Matthieu Arzel; Pierre-Henri Horrein; Tristan Groleat; Christian Person (CNS, 2017)

Large-Scale Memory of Sequences Using Binary Sparse Neural Networks on GPU. - Max Raphael Sobroza Marques; Ghouthi Boukli Hacene; Carlos Eduardo Rosar Kós Lassance; Pierre-Henri Horrein (HPCS, 2017)

Spatio-Temporal Interpolation of Cloudy SST Fields Using Conditional Analog Data Assimilation. - Ronan Fablet; Phi Huynh Viet; Redouane Lguensat; Pierre-Henri Horrein; Bertrand Chapron (Remote. Sens., 2018)

(System)Verilog to Chisel Translation for Faster Hardware Design. - Jean Bruant; Pierre-Henri Horrein; Olivier Muller; Tristan Groléat; Frédéric Pétrot (RSP, 2020)

Toward Agile Hardware Designs With Chisel: A Network Use Case. - Jean Bruant; Pierre-Henri Horrein; Olivier Muller; Tristan Groléat; Frédéric Pétrot (IEEE Des. Test, 2022)