Evaluation of SET and SEU Effects at Multiple Abstraction Levels. - Lorena Anghel; Régis Leveugle; Pierre Vanhauwaert (IOLTS, 2005)

A Flexible SoPC-based Fault Injection Environment. - Pierre Vanhauwaert; Régis Leveugle; Philippe Roche (DDECS, 2006)

Reduced Instrumentation and Optimized Fault Injection Control for Dependability Analysis. - Pierre Vanhauwaert; Régis Leveugle; Philippe Roche (VLSI-SoC, 2006)

Evaluation of Register-Level Protection Techniques for the Advanced Encryption Standard by Multi-Level Fault Injections. - Paolo Maistri; Pierre Vanhauwaert; Régis Leveugle (DFT, 2007)

A Novel Double-Data-Rate AES Architecture Resistant against Fault Injection. - Paolo Maistri; Pierre Vanhauwaert; Régis Leveugle (FDTC, 2007)

Usefulness and effectiveness of HW and SW protection mechanisms in a processor-based system. - Pierre Vanhauwaert; Michele Portolan; Régis Leveugle; Philippe Roche (ICECS, 2008)

Statistical fault injection: Quantified error and confidence. - Régis Leveugle; A. Calvez; Paolo Maistri; Pierre Vanhauwaert (DATE, 2009)

On error models for RTL security evaluations. - Pierre Vanhauwaert; Paolo Maistri; Régis Leveugle; Athanasios Papadimitriou; David Hély; Vincent Beroulle (DTIS, 2014)

IDSM: An improved disjoint signature monitoring scheme for processor behavioral checking. - Salma Bergaoui; Pierre Vanhauwaert; Régis Leveugle (LATW, 2014)

Laser-Induced Fault Effects in Security-Dedicated Circuits. - Vincent Beroulle; Philippe Candelier; Stephan De Castro; Giorgio Di Natale; Jean-Max Dutertre; Marie-Lise Flottes; David Hély; Guillaume Hubert; Régis Leveugle; Feng Lu; Paolo Maistri; Athanasios Papadimitriou; et al. (VLSI-SoC (Selected Papers), 2014)

Laser-induced fault effects in security-dedicated circuits. - Régis Leveugle; Paolo Maistri; Pierre Vanhauwaert; Feng Lu; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre; Athanasios Papadimitriou; David Hély; Vincent Beroulle; Guillaume Hubert; Stephan De Castro; et al. (VLSI-SoC, 2014)

Ultra-Fast and High-Reliability SOT-MRAM: From Cache Replacement to Normally-Off Computing. - Guillaume Prenat; Kotb Jabeur; Pierre Vanhauwaert; Gregory di Pendina; Fabian Oboril; Rajendra Bishnoi; Mojtaba Ebrahimi; Nathalie Lamard; Olivier Boulle; Kevin Garello; Juergen Langer; Berthold Ocker; et al. (IEEE Trans. Multi Scale Comput. Syst., 2016)

GREAT: HeteroGeneous IntegRated Magnetic tEchnology Using Multifunctional Standardized sTack. - Mehdi Baradaran Tahoori; Sarath Mohanachandran Nair; Rajendra Bishnoi; Sophiane Senni; Jad Mohdad; Frédérick Mailly; Lionel Torres; Pascal Benoit; Pascal Nouet; Rui Ma; Martin Kreißig; Frank Ellinger; et al. (ISVLSI, 2017)

Using multifunctional standardized stack as universal spintronic technology for IoT. - Mehdi Baradaran Tahoori; Sarath Mohanachandran Nair; Rajendra Bishnoi; Sophiane Senni; Jad Mohdad; Frédérick Mailly; Lionel Torres; Pascal Benoit; Abdoulaye Gamatié; Pascal Nouet; Frederic Ouattara; Gilles Sassatelli; et al. (DATE, 2018)