Precise Tiling for Uniform Loop Nests. - Pierre-Yves Calland; Tanguy Risset (ASAP, 1995)

A New Guaranteed Heuristic for the Software Pipelining Problem. - Pierre-Yves Calland; Alain Darte; Yves Robert (International Conference on Supercomputing, 1996)

Tiling with limited resources. - Pierre-Yves Calland; Jack J. Dongarra; Yves Robert (ASAP, 1997)

Plugging Anti and Output Dependence Removal Techniques Into Loop Parallelization Algorithm. - Pierre-Yves Calland; Alain Darte; Yves Robert; Frédéric Vivien (Parallel Comput., 1997)

On the Removal of Anti- and Output-Dependences. - Pierre-Yves Calland; Alain Darte; Yves Robert; Frédéric Vivien (Int. J. Parallel Program., 1998)

Retiming DAGs [direct acyclic graph]. - Pierre-Yves Calland; Anne Mignotte; Olivier Peyran; Yves Robert; Frédéric Vivien (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1998)

Circuit Retiming Applied to Decomposed Software Pipelining. - Pierre-Yves Calland; Alain Darte; Yves Robert (IEEE Trans. Parallel Distributed Syst., 1998)

Tiling on systems with communication/computation overlap. - Pierre-Yves Calland; Jack J. Dongarra; Yves Robert (Concurr. Pract. Exp., 1999)