Improved rule generation for a neuro-fuzzy network. - Pieter A. van Vuuren; Alwyn J. Hoffman (SMC, 2000)

Block RAM Implementation of a Reconfigurable Real-time PID Controller. - Rikus le Roux; George van Schoor; Pieter van Vuuren (HPCC-ICESS, 2012)

Alcohol and the oculomotor neural circuit: System identification, a delay-based approach. - Willem du Plessis; Pieter van Vuuren; George van Schoor (IWSSIP, 2015)

Using visual texture analysis to classify raw coal components. - Pieter A. van Vuuren; H. C. Dorland; M. le Roux; W. C. Venter; P. Erasmus; M. I. Dorland; Q. P. Campbell (IWSSIP, 2015)

Block RAM-based architecture for real-time reconfiguration using Xilinx® FPGAs. - Rikus le Roux; George van Schoor; Pieter van Vuuren (South Afr. Comput. J., 2015)

Parsing and analysis of a Xilinx FPGA bitstream for generating new hardware by direct bit manipulation in real-time. - Rikus le Roux; George van Schoor; Pieter A. van Vuuren (South Afr. Comput. J., 2019)

Improving functional density of time-critical applications using hardware-based dynamic reconfiguration and bitstream specialisation. - Rikus le Roux; George van Schoor; Pieter A. van Vuuren (South Afr. Comput. J., 2019)