A binary-to-thermometer decoder with built-in redundancy for improved DAC yield. - Georgi I. Radulov; Patrick J. Quinn; Pieter C. W. van Beek; Johannes A. Hegt; Arthur H. M. van Roermund (ISCAS, 2006)

A 14 bit 200 MS/s DAC With SFDR > 78 dBc, IM3 < - 83 dBc and NSD < - 163 dBm/Hz Across the Whole Nyquist Band Enabled by Dynamic-Mismatch Mapping. - Yongjian Tang; Joost Briaire; Kostas Doris; Robert H. M. van Veldhoven; Pieter C. W. van Beek; Hans Hegt; Arthur H. M. van Roermund (IEEE J. Solid State Circuits, 2011)

11.7 A 240mW 16b 3.2GS/s DAC in 65nm CMOS with. - Hans Van de Vel; Joost Briaire; Corné Bastiaansen; Pieter C. W. van Beek; Govert Geelen; Harrie Gunnink; Yongjie Jin; Mustafa Kaba; Kerong Luo; Edward J. F. Paulus; Bang Pham; William Relyveld; et al. (ISSCC, 2014)