Dynamic element matching for pipelined A/D conversion. - Pieter Rombouts; Ludo Weyten (ICECS, 1998)

A 13.5-b 1.2-V micropower extended counting A/D converter. - Pieter Rombouts; Wim De Wilde; Ludo Weyten (IEEE J. Solid State Circuits, 2001)

An efficient technique to eliminate quantisation noise folding in double-sampling Sigma-Delta modulators. - Pieter Rombouts; Johan Raman; Ludo Weyten (ISCAS (3), 2002)

A 250-kHz 94-dB double-sampling ΣΔ modulation A/D converter with a modified noise transfer function. - Pieter Rombouts; Jeroen De Maeyer; Ludo Weyten (IEEE J. Solid State Circuits, 2003)

An approach to tackle quantization noise folding in double-sampling ΣΔ modulation A/D converters. - Pieter Rombouts; Johan Raman; Ludo Weyten (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A jitter insensitive continuous-time ΣΔ modulator using transmission lines. - Luis Hernández 003; Pieter Rombouts; Enrique Prefasi; Susana Patón; Mario Garcia; Celia López (ICECS, 2004)

Addressing static and dynamic errors in bandpass unit element multibit DAC's. - Jeroen De Maeyer; Pieter Rombouts; Ludo Weyten (ISCAS (1), 2004)

Systematic design of double-sampling Sigma Delta ADC's with modified NTF. - Pieter Rombouts; Jeroen De Maeyer; Johan Raman; Ludo Weyten (ISCAS (1), 2004)

A double-sampling extended-counting ADC. - Jeroen De Maeyer; Pieter Rombouts; Ludo Weyten (IEEE J. Solid State Circuits, 2004)

Systematic design of double-sampling ΣΔ A/D converters with a modified noise transfer function. - Pieter Rombouts; Ludo Weyten (IEEE Trans. Circuits Syst. II Express Briefs, 2004)

STF behaviour in a CT ΔΣ modulator. - Jeroen De Maeyer; Johan Raman; Pieter Rombouts; Ludo Weyten (ICECS, 2005)

Synthesis of sigma delta modulators employing continuous time delays. - Luis Hernández 003; Enrique Prefasi; Susana Patón; Pieter Rombouts (ISCAS (4), 2005)

A versatile Nyquist-rate A/D converter with 16-18 bit performance for sensor readout applications. - Pieter Rombouts; Ludo Weyten (Integr., 2005)

Design of double-sampling ΣΔ modulation A/D converters with bilinear integrators. - Pieter Rombouts; Jeroen De Maeyer; Ludo Weyten (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Nyquist-criterion based design of a CT ΣΔ-ADC with a reduced number of comparators. - Jeroen De Maeyer; Pieter Rombouts; Ludo Weyten (ICECS, 2006)

Quadrature Mismatch Shaping with a Complex, Data Directed Swapper. - Stijn Reekmans; Benoit Catteau; Pieter Rombouts; Ludo Weyten (ICECS, 2006)

A continuous-time band-pass Sigma Delta modulator implemented in 0.35µm BiCMOS using transmission lines. - Luis Hernández 003; Enrique Prefasi; Pieter Rombouts (ISCAS, 2006)

Nyquist criterion based design of continuous time Sigma Delta modulators. - Jeroen De Maeyer; Pieter Rombouts; Ludo Weyten (ISCAS, 2006)

Quadrature mismatch shaping with a complex, tree structured DAC. - Stijn Reekmans; Jeroen De Maeyer; Pieter Rombouts; Ludo Weyten (ISCAS, 2006)

A simple on-chip repetitive sampling setup for the quantification of substrate noise. - Michiel De Wilde; Wim Meeus; Pieter Rombouts; Jan Van Campenhout (IEEE J. Solid State Circuits, 2006)

Quadrature Mismatch Shaping for Digital-to-Analog Converters. - Stijn Reekmans; Jeroen De Maeyer; Pieter Rombouts; Ludo Weyten (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

A Digital Calibration Technique for the Correction of Glitches in High-Speed DAC's. - Benoit Catteau; Pieter Rombouts; Ludo Weyten (ISCAS, 2007)

An Unconstrained Architecture for High-Order Sigma Delta Force-Feedback Inertial Sensors. - Johan Raman; Pieter Rombouts; Ludo Weyten (ISCAS, 2007)

Quadrature Mismatch Shaping Techniques for Fully Differential Circuits. - Stijn Reekmans; Pieter Rombouts; Ludo Weyten (ISCAS, 2007)

A delay-based complex double-sampled resonator for use in ƒs/4 quadrature bandpass ΣΔ modulators. - Stijn Reekmans; Pieter Rombouts; Ludo Weyten (IEICE Electron. Express, 2007)

Efficient Multibit Quantization in Continuous-Time Sigma Delta Modulators. - Jeroen De Maeyer; Pieter Rombouts; Ludo Weyten (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Mismatch Insensitive Double-Sampling Quadrature Bandpass SigmaDelta Modulation. - Stijn Reekmans; Pieter Rombouts; Ludo Weyten (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Redundant signed digit coding in binary weighted DACs. - Benoit Catteau; Pieter Rombouts; Ludo Weyten (ICECS, 2008)

An anti-aliasing filter inspired by continuous-time ΔΣ modulation. - Pavel Peev; Bart De Vuyst; Pieter Rombouts; Anas A. Hamoui (ICECS, 2008)

An On-Line Calibration Technique for Mismatch Errors in High-Speed DACs. - Benoit Catteau; Pieter Rombouts; Johan Raman; Ludo Weyten (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

An Unconstrained Architecture for Systematic Design of Higher Order SigmaDelta Force-Feedback Loops. - Johan Raman; Pieter Rombouts; Ludo Weyten (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

A double-sampling cross noise-coupled split ΣΔ-modulation A/D converter with 80 dB SNR. - Maarten De Bock; Pieter Rombouts (ICECS, 2009)

Design of an integrated analog controller for a class-D audio amplifier. - Jochen Verbrugghe; Maarten De Bock; Pieter Rombouts (ICECS, 2009)

A multirate 3.4-to-6.8mW 85-to-66dB DR GSM/bluetooth/UMTS cascade DT ΔΣM in 90nm digital CMOS. - Lynn Bos; Gerd Vandersteen; Julien Ryckaert; Pieter Rombouts; Yves Rolain; Geert Van der Plas (ISSCC, 2009)

Nyquist-criterion based design of a CT SigmaDelta-ADC with a reduced number of comparators. - Jeroen De Maeyer; Pieter Rombouts; Ludo Weyten (Integr., 2009)

Web-Based Trainer for Electrical Circuit Analysis. - Ludo Weyten; Pieter Rombouts; Jeroen De Maeyer (IEEE Trans. Educ., 2009)

5-MHz 11-bit delay-based self-oscillating ΣΔ modulator in 0.025mm2. - Bart De Vuyst; Pieter Rombouts (CICC, 2010)

A 14-bit 250MS/s digital to analog converter with binary weighted Redundant Signed Digit coding. - Benoit Catteau; Bart De Vuyst; Pieter Rombouts; Ludo Weyten (ISCAS, 2010)

Multirate Cascaded Discrete-Time Low-Pass ΔΣ Modulator for GSM/Bluetooth/UMTS. - Lynn Bos; Gerd Vandersteen; Pieter Rombouts; Arnd Geis; Alonso Morgado; Yves Rolain; Geert Van der Plas; Julien Ryckaert (IEEE J. Solid State Circuits, 2010)

Comments on "Performance Analysis of a Hybrid Incremental and Cyclic A/D Conversion Principle". - Pieter Rombouts; Jeroen De Maeyer; Ludo Weyten (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

The Nyquist Criterion: A Useful Tool for the Robust Design of Continuous-Time SigmaDelta Modulators. - Bart De Vuyst; Pieter Rombouts; Jeroen De Maeyer; Georges G. E. Gielen (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

A 40MHz 12bit 84.2dB-SFDR continuous-time delta-sigma modulator in 90nm CMOS. - Xinpeng Xing; Maarten De Bock; Pieter Rombouts; Georges G. E. Gielen (A-SSCC, 2011)

A 5-MHz 11-Bit Self-Oscillating Sigma Delta Modulator With a Delay-Based Phase Shifter in 0.025 mm 2. - Bart De Vuyst; Pieter Rombouts (IEEE J. Solid State Circuits, 2011)

A Rigorous Approach to the Robust Design of Continuous-Time Sigma-Delta Modulators. - Bart De Vuyst; Pieter Rombouts; Georges G. E. Gielen (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)

Validation of Symbolic Expressions in Circuit Analysis E-Learning. - Ludo Weyten; Pieter Rombouts; Benoit Catteau; Maarten De Bock (IEEE Trans. Educ., 2011)

A very compact 1MS/s Nyquist-rate A/D-converter with 12 effective bits. - Pieter Rombouts; Pierre Woestyn; Maarten De Bock; Johan Raman (ESSCIRC, 2012)

Analysis of VCO based noise shaping ADCs linearized by PWM modulation. - Luis Hernández 003; Enrique Prefasi; Susana Patón; Pieter Rombouts (ICECS, 2012)

A double-sampling cross noise-coupled Sigma Delta modulator with a reduced amount of opamps. - Maarten De Bock; Pieter Rombouts (CICC, 2013)

Analytical Expressions for the Distortion of Asynchronous Sigma-Delta Modulators. - Amir Babaie-Fishani; Bjorn Van Keymeulen; Pieter Rombouts (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

Calibration of DAC Mismatch Errors in ΣΔ ADCs Based on a Sine-Wave Measurement. - Maarten De Bock; Xinpeng Xing; Ludo Weyten; Georges G. E. Gielen; Pieter Rombouts (IEEE Trans. Circuits Syst. II Express Briefs, 2013)

A Describing Function Study of Saturated Quantization and Its Application to the Stability Analysis of Multi-Bit Sigma Delta Modulators. - Pieter Rombouts; Maarten De Bock; Jeroen De Maeyer; Ludo Weyten (IEEE Trans. Circuits Syst. I Regul. Pap., 2013)

Analyzing distortion in ASDMs with loop delay. - Amir Babaie-Fishani; Maarten De Bock; Pieter Rombouts (ISCAS, 2014)

Improved offline calibration for DAC mismatch in low OSR ΣΔ ADCs with distributed feedback. - Maarten De Bock; Amir Babaie-Fishani; Pieter Rombouts (ISCAS, 2014)

Influence of Jitter on Limit Cycles in Bang-Bang Clock and Data Recovery Circuits. - Marijn Verbeke; Pieter Rombouts; Arno Vyncke; Guy Torfs (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Analyzing the Effect of Clock Jitter on Self-Oscillating Sigma Delta Modulators. - Dries Vercaemer; Pieter Rombouts (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

A 25 Gb/s All-Digital Clock and Data Recovery Circuit for Burst Mode Applications in PONs. - Marijn Verbeke; Pieter Rombouts; Hannes Ramon; Guy Torfs; Johan Bauwelinck; Xin Yin (ECOC, 2017)

A Mostly Digital VCO-Based CT-SDM With Third-Order Noise Shaping. - Amir Babaie-Fishani; Pieter Rombouts (IEEE J. Solid State Circuits, 2017)

Passive Loop Filter Assistance for CTSDMs. - Dries Vercaemer; Johan Raman; Pieter Rombouts (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

Optimal NTF zero placement in MASH VCO-ADCs with higher order noise shaping. - Eric Gutierrez; Luis Hernández 003; Susana Patón; Pieter Rombouts (ICECS, 2018)

Why and How VCO-based ADCs can improve instrumentation applications. - Eric Gutierrez; Pieter Rombouts; Luis Hernández 003 (ICECS, 2018)

Experimental results on PWM linearization of a VCO-ADC with 3rd order noise shaping. - Amir Babaie-Fishani; Dries Vercaemer; Johan Raman; Pieter Rombouts (ISCAS, 2018)

A 1.8-pJ/b, 12.5-25-Gb/s Wide Range All-Digital Clock and Data Recovery Circuit. - Marijn Verbeke; Pieter Rombouts; Hannes Ramon; Bart Moeneclaey; Xin Yin; Johan Bauwelinck; Guy Torfs (IEEE J. Solid State Circuits, 2018)

A Pulse Frequency Modulation Interpretation of VCOs Enabling VCO-ADC Architectures With Extended Noise Shaping. - Eric Gutierrez; Luis Hernández 003; Fernando Cardes; Pieter Rombouts (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

VCO-ADCs with a Quadrature Band-Pass Noise-Transfer-Function. - Eric Gutierrez; Leidy Mabel Alvero-Gonzalez; Luis Hernández 003; Pieter Rombouts (ISCAS, 2019)

A Current-Mode Floating-Bridge Technique for Closed-Loop ΣΔ Readout of Wheatstone Bridge Sensors. - Johan Raman; Pieter Rombouts (ISCAS, 2019)

Low-Pass Filtering SC-DAC for Reduced Jitter and Slewing Requirements on CTSDMs. - Dries Vercaemer; Johan Raman; Pieter Rombouts (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

Efficient Offline Outer/Inner DAC Mismatch Calibration in Wideband ΔΣ ADCs. - Hui Liu 019; Pieter Rombouts; Georges G. E. Gielen (IEEE Trans. Circuits Syst., 2020)

The Analog Behavior of Pseudo Digital Ring Oscillators Used in VCO ADCs. - Jonas Borgmans; Robbe Riem; Pieter Rombouts (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

The Truth About 2-Level Transition Elimination in Bang-Bang PAM-4 CDRs. - Marijn Verbeke; Guy Torfs; Pieter Rombouts (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

First-order Hold DAC Reconstruction Filtering for Efficient Image Rejection. - Robbe Riem; Tobias Cromheecke; Johan Raman; Pieter Rombouts (ICECS 2022, 2022)

A Fast Offset Reduction Loop Based on a Bilinear Integrator for Sensor Readout Circuits. - Robbe Riem; Johan Raman; Pieter Rombouts (ICECS 2022, 2022)

Noise Optimization of a Resistively-Driven Ring Oscillator for VCO-Based ADCs. - Jonas Borgmans; Pieter Rombouts (ISCAS, 2022)

A 2 MS/s Full Bandwidth Hall System with Low Offset Enabled by Randomized Spinning. - Robbe Riem; Johan Raman; Pieter Rombouts (Sensors, 2022)

Methodology for Readout and Ring Oscillator Optimization Toward Energy-Efficient VCO-Based ADCs. - Jonas Borgmans; Elisa Sacco; Pieter Rombouts; Georges G. E. Gielen (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Analysis of in-band Spurious Tones of VCO-based Analog Filters and Mitigation Techniques. - Victor Medina; Dante Loi; Pieter Rombouts; Luis Hernández 003 (ISCAS, 2023)

A Different View of Sigma-Delta Modulators Under the Lens of Pulse Frequency Modulation. - Victor Medina; Pieter Rombouts; Luis Hernández 003 (CoRR, 2023)

The Mismatch Performance of Pseudo Digital Ring Oscillators Used in VCO ADCs: PSRR and CMRR. - Jonas Borgmans; Pieter Rombouts (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Origin of Frequency-Dependent Distortion and Calibration for Ring Oscillator VCO ADCs. - Brendan Saux; Jonas Borgmans; Johan Raman; Pieter Rombouts (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A Double-Edge Triggered Asynchronous Gray Counter for Use as a Coarse Counter in VCO ADCs. - Johan Raman; Tobias Cromheecke; Simon Ooghe; Brendan Saux; Pieter Rombouts (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A Multi-GHz Inverter-Based ASDM With Distortion Cancellation. - Caro Meysmans; Achim Vandierendonck; Pieter Rombouts; Guy Torfs (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Explaining Sigma-Delta Modulators with Pulse Frequency Modulation. - Victor Medina; Pieter Rombouts; Luis Hernández 003 (ISCAS, 2025)

A State-Space Model for the Analysis of VCO-Based Filters using PFM. - Simon Ooghe; Luis Hernández 003; Johan Raman; Pieter Rombouts (ISCAS, 2025)

A 3.5 GS/s 1-1 MASH VCO ADC With Second-Order Noise Shaping. - Brendan Saux; Jonas Borgmans; Johan Raman; Pieter Rombouts (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)