Impact of Duty Factor, Stress Stimuli, and Gate Drive Strength on Gate Delay Degradation with an Atomistic Trap-Based BTI Model. - Halil Kukner; Pieter Weckx; Praveen Raghavan; Ben Kaczer; Francky Catthoor; Liesbet Van der Perre; Rudy Lauwereins; Guido Groeseneken (DSD, 2012)

Design of a 150 mV Supply, 2 MIPS, 90nm CMOS, Ultra-Low-Power Microprocessor. - Pieter Weckx; Nele Reynders; Ilse de Moffarts; Wim Dehaene (PATMOS, 2012)

Impact of duty factor, stress stimuli, gate and drive strength on gate delay degradation with an atomistic trap-based BTI model. - Halil Kükner; Pieter Weckx; Praveen Raghavan; Ben Kaczer; Francky Catthoor; Liesbet Van der Perre; Rudy Lauwereins; Guido Groeseneken (Microprocess. Microsystems, 2013)

NBTI Aging on 32-Bit Adders in the Downscaling Planar FET Technology Nodes. - Halil Kukner; Pieter Weckx; Sebastien Morrison; Praveen Raghavan; Ben Kaczer; Francky Catthoor; Liesbet Van der Perre; Rudy Lauwereins; Guido Groeseneken (DSD, 2014)

Degradation analysis of datapath logic subblocks under NBTI aging in FinFET technology. - Halil Kukner; Moustafa A. Khatib; Sebastien Morrison; Pieter Weckx; Praveen Raghavan; Ben Kaczer; Francky Catthoor; Liesbet Van der Perre; Rudy Lauwereins; Guido Groeseneken (ISQED, 2014)

On reliability enhancement using adaptive core voltage scaling and variations on nanoscale FPGAs. - Petr Pfeifer; Zdenek Plíva; Pieter Weckx; Ben Kaczer (LATW, 2014)

Characterization and simulation methodology for time-dependent variability in advanced technologies. - Pieter Weckx; Ben Kaczer; Praveen Raghavan; Jacopo Franco; Marko Simicic; Philippe J. Roussel; Dimitri Linten; Aaron Thean; Diederik Verkest; Francky Catthoor; Guido Groeseneken (CICC, 2015)

Comparative analysis of RD and Atomistic trap-based BTI models on SRAM Sense Amplifier. - Innocent Agbo; Mottaqiallah Taouil; Said Hamdioui; Stefan Cosemans; Pieter Weckx; Praveen Raghavan; Francky Catthoor (DTIS, 2015)

Experimental evidences and simulations of trap generation along a percolation path. - Louis Gerrer; Razaidi Hussin; Salvatore M. Amoroso; Jacopo Franco; Pieter Weckx; Marko Simicic; N. Horiguchi; Ben Kaczer; Tibor Grasser; Asen Asenov (ESSDERC, 2015)

Statistical simulations of 6T-SRAM cell ageing using a reliability aware simulation flow. - Razaidi Hussin; Louis Gerrer; Jie Ding; Liping Wang; Salvatore M. Amoroso; Binjie Cheng; Dave Reid; Pieter Weckx; Marko Simicic; Jacopo Franco; Annelies Vanderheyden; Danielle Vanhaeren; et al. (ESSDERC, 2015)

The defect-centric perspective of device and circuit reliability - From individual defects to circuits. - Ben Kaczer; Jacopo Franco; Pieter Weckx; Philippe Roussel; Erik Bury; Moonju Cho; Robin Degraeve; Dimitri Linten; Guido Groeseneken; Halil Kukner; Praveen Raghavan; Francky Catthoor; et al. (ESSDERC, 2015)

Impact of random telegraph noise on ring oscillators evaluated by circuit-level simulations. - Azusa Oshima; Pieter Weckx; Ben Kaczer; Kazutoshi Kobayashi; Takashi Matsumoto (ICICDT, 2015)

Impact of time-dependent variability on the yield and performance of 6T SRAM cells in an advanced HK/MG technology. - Pieter Weckx; Ben Kaczer; Philippe J. Roussel; Francky Catthoor; Guido Groeseneken (ICICDT, 2015)

BTI analysis of SRAM write driver. - Innocent Agbo; Mottaqiallah Taouil; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Francky Catthoor (IDT, 2015)

Origins and implications of increased channel hot carrier variability in nFinFETs. - Ben Kaczer; Jacopo Franco; M. Cho; Tibor Grasser; Philippe J. Roussel; Stanislav Tyaginov; M. Bina; Yannick Wimmer; Luis-Miguel Procel; Lionel Trojman; Felice Crupi; Gregory Pitner; et al. (IRPS, 2015)

Characterization of time-dependent variability using 32k transistor arrays in an advanced HK/MG technology. - Pieter Weckx; Ben Kaczer; C. Chen; Jacopo Franco; Erik Bury; Kausik Chanda; J. Watt; Philippe J. Roussel; Francky Catthoor; Guido Groeseneken (IRPS, 2015)

Integral impact of BTI and voltage temperature variation on SRAM sense amplifier. - Innocent Agbo; Mottaqiallah Taouil; Said Hamdioui; Halil Kukner; Pieter Weckx; Praveen Raghavan; Francky Catthoor (VTS, 2015)

Comparison of NBTI aging on adder architectures and ring oscillators in the downscaling technology nodes. - Halil Kükner; Pieter Weckx; Sébastien Morrison; Jacopo Franco; Maria Toledano-Luque; Moonju Cho; Praveen Raghavan; Ben Kaczer; Doyoung Jang; Kenichi Miyaguchi; Marie Garcia Bardon; Francky Catthoor; et al. (Microprocess. Microsystems, 2015)

Comparative BTI analysis for various sense amplifier designs. - Innocent Agbo; Mottaqiallah Taouil; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Praveen Raghavan; Francky Catthoor (DDECS, 2016)

Read path degradation analysis in SRAM. - Innocent Agbo; Mottaqiallah Taouil; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Francky Catthoor; Wim Dehaene (ETS, 2016)

Capturing True Workload Dependency of BTI-induced Degradation in CPU Components. - Dimitrios Stamoulis; Simone Corbetta; Dimitrios Rodopoulos; Pieter Weckx; Peter Debacker; Brett H. Meyer; Ben Kaczer; Praveen Raghavan; Dimitrios Soudris; Francky Catthoor; Zeljko Zilic (ACM Great Lakes Symposium on VLSI, 2016)

Accuracy of Quasi-Monte Carlo technique in failure probability estimations. - Michail Noltsis; Pieter Weckx; Dimitrios Rodopoulos; Francky Catthoor; Dimitrios Soudris (ICICDT, 2016)

Quantification of Sense Amplifier Offset Voltage Degradation due to Zero-and Run-Time Variability. - Innocent Agbo; Mottaqiallah Taouil; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Praveen Raghavan; Francky Catthoor; Wim Dehaene (ISVLSI, 2016)

Mitigation of sense amplifier degradation using input switching. - Daniel Kraak; Innocent Agbo; Mottaqiallah Taouil; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Francky Catthoor; Wim Dehaene (DATE, 2017)

Device circuit and technology co-optimisation for FinFET based 6T SRAM cells beyond N7. - Mohit Kumar Gupta 001; Pieter Weckx; Stefan Cosemans; Pieter Schuddinck; Rogier Baert; Dmitry Yakimets; Doyoung Jang; Yasser Sherazi; Praveen Raghavan; Alessio Spessot; Anda Mocuta; Wim Dehaene (ESSDERC, 2017)

Dedicated technology threshold voltage tuning for 6T SRAM beyond N7. - Mohit Kumar Gupta 001; Pieter Weckx; Stefan Cosemans; Pieter Schuddinck; Rogier Baert; Doyoung Jang; Yasser Sherazi; Praveen Raghavan; Alessio Spessot; Anda Mocuta; Wim Dehaene (ICICDT, 2017)

Integral Impact of BTI, PVT Variation, and Workload on SRAM Sense Amplifier. - Innocent Agbo; Mottaqiallah Taouil; Daniel Kraak; Said Hamdioui; Halil Kukner; Pieter Weckx; Praveen Raghavan; Francky Catthoor (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Impact and Mitigation of Sense Amplifier Aging Degradation Using Realistic Workloads. - Daniel Kraak; Mottaqiallah Taouil; Innocent Agbo; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Francky Catthoor (IEEE Trans. Very Large Scale Integr. Syst., 2017)

Degradation analysis of high performance 14nm FinFET SRAM. - Daniel Kraak; Innocent Agbo; Mottaqiallah Taouil; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Francky Catthoor (DATE, 2018)

Scaling CMOS beyond Si FinFET: an analog/RF perspective. - Bertrand Parvais; Geert Hellings; Marko Simicic; Pieter Weckx; Jérôme Mitard; Doyoung Jang; V. Deshpande; B. van Liempc; Anabela Veloso; A. Vandooren; Niamh Waldron; Piet Wambacq; et al. (ESSDERC, 2018)

Device aging: A reliability and security concern. - Daniel Kraak; Mottaqiallah Taouil; Said Hamdioui; Pieter Weckx; Francky Catthoor; Abhijit Chatterjee; Adit D. Singh; Hans-Joachim Wunderlich; Naghmeh Karimi (ETS, 2018)

Self-heating-aware CMOS reliability characterization using degradation maps. - Erik Bury; Adrian Vaisman Chasin; Ben Kaczer; Kai-Hsin Chuang; Jacopo Franco; Marko Simicic; Pieter Weckx; Dimitri Linten (IRPS, 2018)

Impact and mitigation of SRAM read path aging. - Innocent Agbo; Mottaqiallah Taouil; Daniel Kraak; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Francky Catthoor; Wim Dehaene (Microelectron. Reliab., 2018)

A brief overview of gate oxide defect properties and their relation to MOSFET instabilities and device and circuit time-dependent variability. - Ben Kaczer; Jacopo Franco; Pieter Weckx; Philippe Roussel; Vamsi Putcha; Erik Bury; Marko Simicic; Adrian Vaisman Chasin; Dimitri Linten; Bertrand Parvais; Francky Catthoor; Gerhard Rzepa; et al. (Microelectron. Reliab., 2018)

Comphy - A compact-physics framework for unified modeling of BTI. - Gerhard Rzepa; Jacopo Franco; Barry J. O'Sullivan; A. Subirats; Marko Simicic; Geert Hellings; Pieter Weckx; Markus Jech; Theresia Knobloch; Michael Waltl; Philippe Roussel; Dimitri Linten; et al. (Microelectron. Reliab., 2018)

Methodology for Application-Dependent Degradation Analysis of Memory Timing. - Daniel Kraak; Innocent Agbo; Mottaqiallah Taouil; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Francky Catthoor (DATE, 2019)

Hardware-Based Aging Mitigation Scheme for Memory Address Decoder. - Daniel Kraak; Innocent Agbo; Mottaqiallah Taouil; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Francky Catthoor (ETS, 2019)

Parametric and Functional Degradation Analysis of Complete 14-nm FinFET SRAM. - Daniel Kraak; Mottaqiallah Taouil; Innocent Agbo; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Francky Catthoor (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Understanding the Impact of Time-Dependent Random Variability on Analog ICs: From Single Transistor Measurements to Circuit Simulations. - Marko Simicic; Pieter Weckx; Bertrand Parvais; Philippe Roussel; Ben Kaczer; Georges G. E. Gielen (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Device Scaling roadmap and its implications for Logic and Analog platform. - Alessio Spessot; Bertrand Parvais; Amita Rawat; Kenichi Miyaguchi; Pieter Weckx; Doyoung Jang; Julien Ryckaert (BCICTS, 2020)

Mitigation of Sense Amplifier Degradation Using Skewed Design. - Daniel Kraak; Mottaqiallah Taouil; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Francky Catthoor (DATE, 2020)

eSRAM Reliability: Why is it still not optimally solved? - Daniël Kraak; Mottaqiallah Taouil; Said Hamdioui; Pieter Weckx; Stefan Cosemans; Francky Catthoor (DTIS, 2020)

Fast & Accurate Methodology for Aging Incorporation in Circuits using Adaptive Waveform Splitting (AWS). - Subrat Mishra; Pieter Weckx; Ji-Yung Lin; Ben Kaczer; Dimitri Linten; Alessio Spessot; Francky Catthoor (IRPS, 2020)

Analysis of Functional Errors Produced by Long-Term Workload-Dependent BTI Degradation in Ultralow Power Processors. - Loris Duch; Miguel Peón-Quirós; Pieter Weckx; Alexandre Levisse; Rubén Braojos; Francky Catthoor; David Atienza (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Overhead Reduction with Optimal Margining Using A Reliability Aware Design Paradigm. - Subrat Mishra; Pieter Weckx; Odysseas Zografos; Ji-Yung Lin; Alessio Spessot; Francky Catthoor (IRPS, 2021)

Reliability and Variability-Aware DTCO Flow: Demonstration of Projections to N3 FinFET and Nanosheet Technologies. - Gerhard Rzepa; Markus Karner; Oskar Baumgartner; Georg Strof; Franz Schanovsky; Ferdinand Mitterbauer; Christian Kernstock; Hui-Wen Karner; Pieter Weckx; Geert Hellings; Dieter Claes; Zhicheng Wu; et al. (IRPS, 2021)

Proactive Run-Time Mitigation for Time-Critical Applications Using Dynamic Scenario Methodology. - Ji-Yung Lin; Pieter Weckx; Subrat Mishra; Alessio Spessot; Francky Catthoor (DATE, 2022)

Design enablement of CFET devices for sub-2nm CMOS nodes. - Odysseas Zografos; Bilal Chehab; Pieter Schuddinck; Gioele Mirabelli; Naveen Kakarla; Yang Xiang; Pieter Weckx; Julien Ryckaert (DATE, 2022)

Evaluating Forksheet FET Reliability Concerns by Experimental Comparison with Co-integrated Nanosheets. - Erik Bury; Adrian Vaisman Chasin; Ben Kaczer; Michiel Vandemaele; Stanislav Tyaginov; Jacopo Franco; Romain Ritzenthaler; Hans Mertens; Pieter Weckx; N. Horiguchi; Dimitri Linten (IRPS, 2022)

Opportunities of Chip Power Integrity and Performance Improvement through Wafer Backside (BS) Connection: Invited Paper. - Rongmei Chen; Giuliano Sisto; Odysseas Zografos; Dragomir Milojevic; Pieter Weckx; Geert Van der Plas; Eric Beyne (SLIP, 2022)

Backside PDN and 2.5D MIMCAP to Double Boost 2D and 3D ICs IR-Drop beyond 2nm Node. - Rongmei Chen; Giuliano Sisto; Michele Stucchi; Anne Jourdain; Kenichi Miyaguchi; Pieter Schuddinck; P. Woeltgens; H. Lin; Naveen Kakarla; Anabela Veloso; Dragomir Milojevic; Odysseas Zografos; et al. (VLSI Technology and Circuits, 2022)

Multitimescale Mitigation for Performance Variability Improvement in Time-Critical Systems. - Ji-Yung Lin; Pieter Weckx; Subrat Mishra; Alessio Spessot; Francky Catthoor (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Evaluation of Nanosheet and Forksheet Width Modulation for Digital IC Design in the Sub-3-nm Era. - Giuliano Sisto; Odysseas Zografos; Bilal Chehab; Naveen Kakarla; Yang Xiang; Dragomir Milojevic; Pieter Weckx; Geert Hellings; Julien Ryckaert (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Thermal Performance Analysis of Mempool RISC-V Multicore SoC. - Sankatali Venkateswarlu; Subrat Mishra; Herman Oprins; Bjorn Vermeersch; Moritz Brunion; Jun-Han Han; Mircea R. Stan; Pieter Weckx; Francky Catthoor (IEEE Trans. Very Large Scale Integr. Syst., 2022)

Learning-Oriented Reliability Improvement of Computing Systems From Transistor to Application Level. - Behnaz Ranjbar; Florian Klemme; Paul R. Genssler; Hussam Amrouch; Jinhyo Jung; Shail Dave; Hwisoo So; Kyongwoo Lee; Aviral Shrivastava; Ji-Yung Lin; Pieter Weckx; Subrat Mishra; et al. (DATE, 2023)

Towards Chip-Package-System Co-optimization of Thermally-limited System-On-Chips (SOCs). - Subrat Mishra; Sankatali Venkateswarlu; Bjorn Vermeersch; Moritz Brunion; Melina Lofrano; Dawit Burusie Abdi; Herman Oprins; Dwaipayan Biswas; Odysseas Zografos; Gaspard Hiblot; Geert Van der Plas; Pieter Weckx; et al. (IRPS, 2023)

Impact of interconnects enhancement on SRAM design beyond 5nm technology node. - Mohit Kumar Gupta 001; Pieter Weckx; Manu Perumkunnil Komalan; Julien Ryckaert (ISCAS, 2023)

Block-level Evaluation and Optimization of Backside PDN for High-Performance Computing at the A14 node. - Giuliano Sisto; R. Preston; Rongmei Chen; Gioele Mirabelli; Anita Farokhnejad; Yun Zhou; Ivan Ciofi; Anne Jourdain; A. Veloso; Michele Stucchi; Odysseas Zografos; Pieter Weckx; et al. (VLSI Technology and Circuits, 2023)

3D SRAM Macro Design in 3D Nanofabric Process Technology. - Dawit Burusie Abdi; Shairfe Muhammad Salahuddin; Jürgen Bömmels; Edouard Giacomin; Pieter Weckx; Julien Ryckaert; Geert Hellings; Francky Catthoor (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Impact of 3-D Integration on Thermal Performance of RISC-V MemPool Multicore SOC. - Sankatali Venkateswarlu; Subrat Mishra; Herman Oprins; Bjorn Vermeersch; Moritz Brunion; Jun-Han Han; Mircea R. Stan; Dwaipayan Biswas; Pieter Weckx; Francky Catthoor (IEEE Trans. Very Large Scale Integr. Syst., 2023)

Silent Data Corruption: Test or Reliability Problem? - Erik Jan Marinissen; Harish Dattatraya Dixit; Ronald Shawn Blanton; Aaron Kuo; Wei Li; Subhasish Mitra; Chris Nigh; Ruben Purdy; Ben Kaczer; Dishant Sangani; Pieter Weckx; Philippe J. Roussel; et al. (ETS, 2024)

Thermal Performance Evaluation of Multi-Core SOCs Using Power-Thermal Co-Simulation. - Subrat Mishra; Bjorn Vermeersch; Sankatali Venkateswarlu; Halil Kukner; A. Sharma; G. Mirabeli; Fabian M. Bufler; Moritz Brunion; Dawit Burusie Abdi; Herman Oprins; Dwaipayan Biswas; Odysseas Zografos; et al. (IRPS, 2024)

Possible Origins, Identification, and Screening of Silent Data Corruption in Data Centers. - Dishant Sangani; Ben Kaczer; Pieter Weckx; Philippe J. Roussel; Subrat Mishra; Erik Jan Marinissen; Georges G. E. Gielen (IRPS, 2024)

Thermal Considerations for Block-Level PPA Assessment in Angstrom Era: A Comparison Study of Nanosheet FETs (A10) & Complementary FETs (A5). - S. Mishra; Bjorn Vermeersch; Sankatali Venkateswarlu; Halil Kukner; Gioele Mirabelli; Fabian M. Bufler; Moritz Brunion; Dawit Burusie Abdi; Herman Oprins; Dwaipayan Biswas; Odysseas Zografos; Francky Catthoor; et al. (VLSI Technology and Circuits, 2024)

Backside Power Delivery in High Density and High Performance Context: IR-Drop and Block-Level Power-Performance-Area Benefits. - Yun Zhou; S. C. Song; Halil Kükner; Giuliano Sisto; Sheng Yang; Anita Farokhnejad; Mohamed Naeim; Moritz Brunion; Ji-Yung Lin; Odysseas Zografos; Pieter Weckx; Shashank Ekbote; et al. (VLSI Technology and Circuits, 2024)

Future Design Direction for SRAM Data Array: Hierarchical Subarray With Active Interconnect. - Hsiao-Hsuan Liu; Carlo Gilardi; Shairfe Muhammad Salahuddin; Zhenlin Pei; Pieter Schuddinck; Yang Xiang; Pieter Weckx; Geert Hellings; Marie Garcia Bardon; Julien Ryckaert; Chenyun Pan; Subhasish Mitra; et al. (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Towards a Computationally Efficient Verilog-A Defect-Centric BTI Compact Model for Circuit Aging Simulations. - Dishant Sangani; Dieter Claes; Pieter Weckx; Ben Kaczer; Georges G. E. Gielen (IRPS, 2025)