A GSM speech coder implemented on a customized processor architecture. - Viktor Öwall; Pietro Andreani; L. Brange; Peter Nilsson 001; A. Wass; Mats Torkelson (ISCAS, 1993)

Characteristic polynomial and zero polynomial with the Cochrun-Grabel method. - Pietro Andreani; Sven Mattisson (Int. J. Circuit Theory Appl., 1998)

Multihit multichannel time-to-digital converter with ±1% differential nonlinearity and near optimal time resolution. - Pietro Andreani; Franco Bigongiari; Roberto Roncella; Roberto Saletti; Pierangelo Terreni; Adriano Bigongiari; Maurizio Lippi (IEEE J. Solid State Circuits, 1998)

A 2.4-GHz CMOS monolithic VCO based on an MOS varactor. - Pietro Andreani; Sven Mattisson (ISCAS (2), 1999)

A chip for linearization of RF power amplifiers using digital predistortion with a bit-parallel complex multiplier. - Pietro Andreani; Lars Sundström; Niklas Karlsson; M. Svensson (ISCAS (1), 1999)

A CMOS gm-C IF filter for Bluetooth. - Pietro Andreani; Sven Mattisson (CICC, 2000)

A 1.8-GHz CMOS VCO tuned by an accumulation-mode MOS varactor. - Pietro Andreani; Sven Mattisson (ISCAS, 2000)

On the use of MOS varactors in RF VCOs. - Pietro Andreani; Sven Mattisson (IEEE J. Solid State Circuits, 2000)

A 2.2 GHz CMOS VCO with inductive degeneration noise suppression. - Pietro Andreani; Henrik Sjöland (CICC, 2001)

A 1.8-GHz monolithic CMOS VCO tuned by an inductive varactor. - Pietro Andreani (ISCAS (4), 2001)

A 57-dB image band rejection CMOS Gm-C polyphase filter with automatic frequency tuning for Bluetooth. - Bo Shi; Weiyun Shan; Pietro Andreani (ISCAS (5), 2002)

Bandwidth considerations for a CALLUM transmitter architecture. - Roland Strandberg; Pietro Andreani; Lars Sundström (ISCAS (4), 2002)

Circuits and devices with integrated VFETs and RTDs. - Lars-Erik Wernersson; Erik Lind; Peter Lindström; Pietro Andreani (ISCAS (5), 2002)

Analysis and design of a 1.8-GHz CMOS LC quadrature VCO. - Pietro Andreani; Andrea Bonfanti; Luca Romanò; Carlo Samori (IEEE J. Solid State Circuits, 2002)

On the use of Nauta's transconductor in low-frequency CMOS gm-C bandpass filters. - Pietro Andreani; Sven Mattisson (IEEE J. Solid State Circuits, 2002)

Tail current noise suppression in RF CMOS VCOs. - Pietro Andreani; Henrik Sjöland (IEEE J. Solid State Circuits, 2002)

Impact of mutual inductance and parasitic capacitance on the phase-error performance of CMOS quadrature VCOs. - Xiaoyan Wang; Pietro Andreani (ISCAS (1), 2003)

Highly functional tunnelling devices integrated in 3D. - Lars-Erik Wernersson; Erik Lind; Peter Lindström; Pietro Andreani (Int. J. Circuit Theory Appl., 2003)

Comparison of the image rejection between the passive and the Gilbert mixer. - Xiaoyan Wang; Pietro Andreani (ISCAS (1), 2004)

On the phase-noise and phase-error performances of multiphase LC CMOS VCOs. - Pietro Andreani; Xiaoyan Wang (IEEE J. Solid State Circuits, 2004)

Phase noise analysis and design of a 3-GHz bipolar differential colpitts VCO. - Xiaoyan Wang; Ali Fard; Pietro Andreani (ESSCIRC, 2005)

Technology scaling impact on embedded ADC design for telecom receivers. - Jannik Hammel Nielsen; Pietro Andreani; Piero Malcovati; Andrea Baschirotto (ISCAS (5), 2005)

A study of phase noise in colpitts and LC-tank CMOS oscillators. - Pietro Andreani; Xiaoyan Wang; Luca Vandi; Ali Fard (IEEE J. Solid State Circuits, 2005)

Detailed Behavioral Modeling of Bang-Bang Phase Detectors. - Chenhui Jiang; Pietro Andreani; U. D. Keil (APCCAS, 2006)

A 2.3GHz LC-tank CMOS VCO with optimal phase noise performance. - Pietro Andreani; Ali Fard (ISSCC, 2006)

A 5.4mW GPS CMOS Quadrature Front-End Based on a Single-Stage LNA-Mixer-VCO. - Antonio Liscidini; Andrea Mazzanti; Riccardo Tonietto; Luca Vandi; Pietro Andreani; Rinaldo Castello (ISSCC, 2006)

A 240W Monolithic Class-D Audio Amplifier Output Stage. - Flemming Nyboe; Cetyn Kaya; Lars Risbo; Pietro Andreani (ISSCC, 2006)

More on the$1/{ rm f}^{2}$Phase Noise Performance of CMOS Differential-PairLC-Tank Oscillators. - Pietro Andreani; Ali Fard (IEEE J. Solid State Circuits, 2006)

Single-Stage Low-Power Quadrature RF Receiver Front-End: The LMV Cell. - Antonio Liscidini; Andrea Mazzanti; Riccardo Tonietto; Luca Vandi; Pietro Andreani; Rinaldo Castello (IEEE J. Solid State Circuits, 2006)

On the amplitude and phase errors of quadrature LC-tank CMOS oscillators. - Andrea Mazzanti; Pietro Andreani (IEEE J. Solid State Circuits, 2006)

A time-variant analysis of the 1/f2 phase noise in CMOS parallel LC-tank quadrature oscillators. - Pietro Andreani (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

A 0.35μm 50V CMOS sliding-mode control IC for buck converters. - Mikkel Hoyerby; Michael A. E. Andersen; Pietro Andreani (ESSCIRC, 2007)

A 0.2V, 7.5 μW, 20 kHz ΣΔ modulator with 69 dB SNR in 90 nm CMOS. - Ulrik Wismar; Dag T. Wisland; Pietro Andreani (ESSCIRC, 2007)

45% Power Saving in a 0.25μm BiCMOS 10Gb/s 50Ω-Terminated Packaged Active-Load Laser Driver. - Emre Ayranci; Kenn Christensen; Pietro Andreani (ISSCC, 2007)

An Analysis of 1/f2 Phase Noise in Bipolar Colpitts Oscillators (With a Digression on Bipolar Differential-Pair LC Oscillators). - Ali Fard; Pietro Andreani (IEEE J. Solid State Circuits, 2007)

A 1.4mW 4.90-to-5.65GHz Class-C CMOS VCO with an Average FoM of 194.5dBc/Hz. - Andrea Mazzanti; Pietro Andreani (ISSCC, 2008)

Comments on "Comments on "A General Theory of Phase Noise in Electrical Oscillators"". - Lei Lu; Zhangwen Tang; Pietro Andreani; Andrea Mazzanti; Ali Hajimiri (IEEE J. Solid State Circuits, 2008)

Author's Response. - Lei Lu; Zhangwen Tang; Pietro Andreani; Andrea Mazzanti; Ali Hajimiri (IEEE J. Solid State Circuits, 2008)

Sensitivity Degradation in a Tri-Band GSM BiCMOS Direct-Conversion Receiver Caused by Transient Substrate Heating. - Sven Mattisson; Hans Hagberg; Pietro Andreani (IEEE J. Solid State Circuits, 2008)

Class-C Harmonic CMOS VCOs, With a General Result on Phase Noise. - Andrea Mazzanti; Pietro Andreani (IEEE J. Solid State Circuits, 2008)

A compact CMOS MEMS microphone with 66dB SNR. - Jelena Citakovic; Per F. Hovesten; Gino Rocca; Aart van Halteren; Pirmin Rombach; Lars J. Stenberg; Pietro Andreani; Erik Bruun (ISSCC, 2009)

A Time-Variant Analysis of Fundamental 1/f3 Phase Noise in CMOS Parallel LC -Tank Quadrature Oscillators. - Andrea Mazzanti; Pietro Andreani (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

A transmitter CMOS VCO for WCDMA/EDGE. - Pietro Andreani; Kirill Kozmin; Per Sandrup; Thomas Mattsson (ESSCIRC, 2010)

Impact of MOS threshold-voltage mismatch in current-steering DACs for CT ΣΔ modulators. - Mattias Andersson 003; Martin Anderson; Pietro Andreani; Lars Sundström (ISCAS, 2010)

Accurate time-variant analysis of a current-reuse 2.2 GHz 1.3 mW CMOS front-end. - Matteo Camponeschi; Andrea Bevilacqua; Andrea Neviani; Pietro Andreani (ISCAS, 2010)

A 90nm CMOS gated-ring-oscillator-based Vernier time-to-digital converter for DPLLs. - Ping Lu 002; Pietro Andreani; Antonio Liscidini (ESSCIRC, 2011)

On the bias noise to phase noise conversion in harmonic oscillators using Groszkowski theory. - Andrea Bevilacqua; Pietro Andreani (ISCAS, 2011)

A 9-band WCDMA/EDGE transceiver supporting HSPA evolution. - Magnus Nilsson; Sven Mattisson; Nikolaus Klemmer; Martin Anderson; Torkel Arnborg; Peter Caputa; Staffan Ek; Lin Fan; Henrik Fredriksson; Fabien Garrigues; Henrik Geis; Hans Hagberg; et al. (ISSCC, 2011)

A 2.7GHz divider-less all digital phase-locked loop with 625Hz frequency resolution in 90nm CMOS. - Mohammed Abdulaziz; Muhammad Shakir; Ping Lu 002; Pietro Andreani (NORCHIP, 2011)

A 2.7-6.1GHz CMOS local oscillator based on frequency multiplication by 3/2. - Andrea Bevilacqua; Pietro Andreani (NORCHIP, 2011)

Dynamic bias schemes for class-C VCOs. - Luca Fanori; Pietro Andreani (NORCHIP, 2011)

Highly linear direct conversion receiver using customized on-chip balun. - Xiaodong Liu; Vijay Viswam; Stefan Back Andersson; Johan Wernehag; Imad ud Din; Pietro Andreani (NORCHIP, 2011)

A continuous time ΔΣ modulator with reduced clock jitter sensitivity through DSCR feedback. - Dejan Radjen; Pietro Andreani; Martin Anderson; Lars Sundström (NORCHIP, 2011)

A mixed mode design flow for multi GHz ADPLLs. - Muhammad Shakir; Mohammed Abdulaziz; Ping Lu 002; Pietro Andreani (NORCHIP, 2011)

Single-ended low noise multiband LNA with programmable integrated matching and high isolation switches. - Tobias Tired; Pietro Andreani (NORCHIP, 2011)

A digital PLL with a multi-delay coarse-fine TDC. - Ying Wu 003; Ping Lu 002; Pietro Andreani (NORCHIP, 2011)

A TX VCO for WCDMA/EDGE in 90 nm RF CMOS. - Pietro Andreani; Kirill Kozmin; Per Sandrup; Magnus Nilsson; Thomas Mattsson (IEEE J. Solid State Circuits, 2011)

Low-phase-noise 3.4-4.5 GHz dynamic-bias class-C CMOS VCOs with a FoM of 191 dBc/Hz. - Luca Fanori; Pietro Andreani (ESSCIRC, 2012)

A 90nm CMOS digital PLL based on Vernier-Gated-Ring-Oscillator Time-to-Digital Converter. - Ping Lu 002; Ying Wu 003; Pietro Andreani (ISCAS, 2012)

A 6.7-to-9.2GHz 55nm CMOS hybrid Class-B/Class-C cellular TX VCO. - Luca Fanori; Antonio Liscidini; Pietro Andreani (ISSCC, 2012)

A 36mW/9mW power-scalable DCO in 55nm CMOS for GSM/WCDMA frequency synthesizers. - Antonio Liscidini; Luca Fanori; Pietro Andreani; Rinaldo Castello (ISSCC, 2012)

A 90nm CMOS gated-ring-oscillator-based 2-dimension Vernier time-to-digital converter. - Ping Lu 002; Pietro Andreani; Antonio Liscidini (NORCHIP, 2012)

A 3.6 mW, 90 nm CMOS Gated-Vernier Time-to-Digital Converter With an Equivalent Resolution of 3.2 ps. - Ping Lu 002; Antonio Liscidini; Pietro Andreani (IEEE J. Solid State Circuits, 2012)

Phase Noise Analysis of the Tuned-Input-Tuned-Output (TITO) Oscillator. - Andrea Bevilacqua; Pietro Andreani (IEEE Trans. Circuits Syst. II Express Briefs, 2012)

An Analysis of 1/f Noise to Phase Noise Conversion in CMOS Harmonic Oscillators. - Andrea Bevilacqua; Pietro Andreani (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

A 9MHz filtering ADC with additional 2nd-order ΔΣ modulator noise suppression. - Mattias Andersson 003; Martin Anderson; Lars Sundström; Sven Mattisson; Pietro Andreani (ESSCIRC, 2013)

A high-swing complementary class-C VCO. - Luca Fanori; Pietro Andreani (ESSCIRC, 2013)

A wide bandwidth fractional-N synthesizer for LTE with phase noise cancellation using a hybrid-ΔΣ-DAC and charge re-timing. - Dawei Ye; Ping Lu 002; Pietro Andreani; Ronan A. R. van der Zee (ISCAS, 2013)

A 2.5-to-3.3GHz CMOS Class-D VCO. - Luca Fanori; Pietro Andreani (ISSCC, 2013)

A low-power 2nd-order CT ΔΣ modulator with a single operational amplifier. - Dejan Radjen; Pietro Andreani; Martin Anderson; Lars Sundström (NORCHIP, 2013)

Highly Efficient Class-C CMOS VCOs, Including a Comparison With Class-B VCOs. - Luca Fanori; Pietro Andreani (IEEE J. Solid State Circuits, 2013)

Class-D CMOS Oscillators. - Luca Fanori; Pietro Andreani (IEEE J. Solid State Circuits, 2013)

A Push-Pull Class-C CMOS VCO. - Andrea Mazzanti; Pietro Andreani (IEEE J. Solid State Circuits, 2013)

A Class-D CMOS DCO with an on-chip LDO. - Luca Fanori; Thomas Mattsson; Pietro Andreani (ESSCIRC, 2014)

Lessons from ten years of the international master's program in System-on-Chip. - Peter Nilsson 001; Pietro Andreani; Krzysztof Kuchcinski; Joachim Rodrigues; Henrik Sjöland; Markus Törmänen; Lars-Erik Wernersson; Viktor Öwall (EWME, 2014)

An 11mW continuous time delta-Sigma modulator with 20 MHz bandwidth in 65nm CMOS. - Xiaodong Liu; Mattias Andersson 003; Martin Anderson; Lars Sundström; Pietro Andreani (ISCAS, 2014)

A 1-1 MASH 2-D vernier time-to-digital converter with 2nd-order noise shaping. - Ping Lu 002; Pietro Andreani (ISCAS, 2014)

21.6 A 2.4-to-5.3GHz dual-core CMOS VCO with concentric 8-shaped coils. - Luca Fanori; Thomas Mattsson; Pietro Andreani (ISSCC, 2014)

A low-power 2nd-order CT ΔΣ modulator with an asynchronous SAR quantizer. - Dejan Radjen; Martin Anderson; Lars Sundström; Pietro Andreani (NORCHIP, 2014)

A Filtering ΔΣ ADC for LTE and Beyond. - Mattias Andersson 003; Martin Anderson; Lars Sundström; Sven Mattisson; Pietro Andreani (IEEE J. Solid State Circuits, 2014)

A Power-Scalable DCO for Multi-Standard GSM/WCDMA Frequency Synthesizers. - Antonio Liscidini; Luca Fanori; Pietro Andreani; Rinaldo Castello (IEEE J. Solid State Circuits, 2014)

A 0.6-3.0GHz 65nm CMOS radio receiver with ΔΣ-based A/D-converting channel-select filters. - Anders Nejdel; Xiaodong Liu; Mattias Palm; Lars Sundström; Markus Törmänen; Henrik Sjöland; Pietro Andreani (ESSCIRC, 2015)

A 65nm CMOS fraction-N digital PLL with shaped in-band phase noise. - Ahmed Mahmoud; Pietro Andreani; Ping Lu 002 (NORCAS, 2015)

Digital background calibration in continuous-time delta-sigma analog to digital converters. - Siyu Tan; Yun Miao; Mattias Palm; Joachim Rodrigues; Pietro Andreani (NORCAS, 2015)

An experimental comparison between two widely adopted phase noise models. - Federico Pepe; Pietro Andreani (NORCAS, 2016)

New Associate Editors. - Michael P. Flynn; Pietro Andreani; SeongHwan Cho (IEEE J. Solid State Circuits, 2016)

A 65 nm CMOS Wideband Radio Receiver With ΔΣ-Based A/D-Converting Channel-Select Filters. - Xiaodong Liu; Anders Nejdel; Mattias Palm; Lars Sundström; Markus Törmänen; Henrik Sjöland; Pietro Andreani (IEEE J. Solid State Circuits, 2016)

A 2.2-ps Two-Dimensional Gated-Vernier Time-to-Digital Converter With Digital Calibration. - Ping Lu 002; Ying Wu 003; Pietro Andreani (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

Still More on the 1/f2 Phase Noise Performance of Harmonic Oscillators. - Federico Pepe; Pietro Andreani (IEEE Trans. Circuits Syst. II Express Briefs, 2016)

A General Theory of Phase Noise in Transconductor-Based Harmonic Oscillators. - Federico Pepe; Pietro Andreani (IEEE Trans. Circuits Syst. I Regul. Pap., 2017)

On the Remarkable Performance of the Series-Resonance CMOS Oscillator. - Federico Pepe; Andrea Bevilacqua; Pietro Andreani (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

A 19.5 GHz 28 nm CMOS Class-C VCO with Reduced 1/f Noise Upconversion. - Alessandro Franceschin; Pietro Andreani; Fabio Padovan; Matteo Bassi; Roberto Nonis; Andrea Bevilacqua (ESSCIRC, 2019)

A 5 GHz CT $ Delta sum$ ADC with 250 MHz Signal Bandwidth in 28 nm-FDSOI CMOS. - Siyu Tan; Lars Sundström; Mattias Palm; Sven Mattisson; Pietro Andreani (NORCAS, 2019)

An Accurate Analysis of Phase Noise in CMOS Ring Oscillators. - Federico Pepe; Pietro Andreani (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

A 10-Bit Split-Capacitor SAR ADC with DAC Imbalance Estimation and Calibration. - Siyu Tan; Daniele Mastantuono; Roland Strandberg; Lars Sundström; Pietro Andreani; Mattias Palm (ISCAS, 2020)

A Design Method to Minimize the Impact of Bit Conversion Errors in SAR ADCs. - Siyu Tan; Mattias Palm; Daniele Mastantuono; Roland Strandberg; Lars Sundström; Sven Mattisson; Pietro Andreani (NorCAS, 2020)

A 19.5-GHz 28-nm Class-C CMOS VCO, With a Reasonably Rigorous Result on 1/f Noise Upconversion Caused by Short-Channel Effects. - Alessandro Franceschin; Pietro Andreani; Fabio Padovan; Matteo Bassi; Andrea Bevilacqua (IEEE J. Solid State Circuits, 2020)

Analysis and Design of a 17-GHz All-npn Push-Pull Class-C VCO. - Simone Veni; Pietro Andreani; Michele Caruso; Marc Tiebout; Andrea Bevilacqua (IEEE J. Solid State Circuits, 2020)

A 12-GHz Reconfigurable Multicore CMOS DCO, With a Time-Variant Analysis of the Impact of Reconfiguration Switches on Phase Noise. - Lorenzo Tomasin; Pietro Andreani; Giovanni Boi; Fabio Padovan; Andrea Bevilacqua (IEEE J. Solid State Circuits, 2022)

A High-Speed Comparator Using a New Regeneration Latch. - Hamid Karrari; Pietro Andreani; Siyu Tan (MWSCAS, 2023)

A Technique to Increase the Linearity of the Bootstrapped Switch. - Hamid Karrari; Pietro Andreani; Siyu Tan (MWSCAS, 2023)

A 1.4 GS/s TI Pipelined-SAR analog-to-digital converter in 22-nm FDSOI CMOS. - Hamid Karrari; Pietro Andreani; Siyu Tan (NorCAS, 2023)

Some Results on Oscillation Stability in Multi-Mode Harmonic Oscillators. - Pietro Andreani (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

On the Calculation and Simulation of Loop Gain in Feedback Circuits. - Baktash Behmanesh; Pietro Andreani (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Asynchronous vs Synchronous SAR ADCs - Performance Beyond Nominal Speed. - Hamid Karrari; Pietro Andreani; Siyu Tan (PRIME, 2024)

A 12-bit High-Speed Time-Interleaved Pipelined Asynchronous Successive-Approximation ADC in 22-nm FDSOI CMOS. - Hamid Karrari; Pietro Andreani; Siyu Tan (IEEE Access, 2024)