A Technique to Generate CMOS VLSI Flip-Flops Based on Differential Latches. - Raúl Jiménez; Pilar Parra Fernández; Pedro Sanmartín; Antonio J. Acosta 001 (PATMOS, 2002)

Selective Clock-Gating for Low Power/Low Noise Synchronous Counters 1. - Pilar Parra Fernández; Antonio J. Acosta 001; Manuel Valencia-Barrero (PATMOS, 2002)

A New Hybrid CBL-CMOS Cell for Optimum Noise/Power Application. - Raúl Jiménez; Pilar Parra Fernández; Pedro Sanmartín; Antonio J. Acosta 001 (PATMOS, 2003)

Selective Clock-Gating for Low-Power Synchronous Counters. - Pilar Parra Fernández; Antonio J. Acosta 001; Raúl Jiménez; Manuel Valencia-Barrero (J. Low Power Electron., 2005)

Optimization of Master-Slave Flip-Flops for High-Performance Applications. - Raúl Jiménez; Pilar Parra Fernández; Javier Castro-Ramirez; Manuel Sanchez-Raya; Antonio J. Acosta 001 (PATMOS, 2006)

A switching noise vision of the optimization techniques for low-power synthesis. - Javier Castro-Ramirez; Pilar Parra Fernández; Manuel Valencia-Barrero; Antonio J. Acosta 001 (ECCTD, 2007)

Asymmetric clock driver for improved power and noise performances. - Javier Castro-Ramirez; Pilar Parra Fernández; Manuel Valencia-Barrero; Antonio J. Acosta 001 (ISCAS, 2007)

Switching Noise Optimization in the Wake-Up Phase of Leakage-Aware Power Gating Structures. - Javier Castro-Ramirez; Pilar Parra Fernández; Antonio J. Acosta 001 (PATMOS, 2009)

Optimization of clock-gating structures for low-leakage high-performance applications. - Javier Castro-Ramirez; Pilar Parra Fernández; Antonio J. Acosta 001 (ISCAS, 2010)

Floorplanning as a practical countermeasure against clock fault attack in Trivium stream cipher. - Francisco Eugenio Potestad-Ordóñez; Carlos Jesús Jiménez-Fernández; Carmen Baena Oliva; Pilar Parra Fernández; Manuel Valencia-Barrero (DCIS, 2018)

An Academic Approach to FPGA Design Based on a Distance Meter Circuit. - Carlos Jesús Jiménez-Fernández; Carmen Baena Oliva; Pilar Parra Fernández; Francisco Eugenio Potestad-Ordóñez; Manuel Valencia-Barrero (Rev. Iberoam. de Tecnol. del Aprendiz., 2020)

Breaking Trivium Stream Cipher Implemented in ASIC Using Experimental Attacks and DFA. - Francisco Eugenio Potestad-Ordóñez; Manuel Valencia-Barrero; Carmen Baena Oliva; Pilar Parra Fernández; Carlos Jesús Jiménez-Fernández (Sensors, 2020)