A 0.07 pJ/b/dB 36-Gb/s PAM-3 Receiver Using Inductor-Reused CTLE and One-Tap Loop-Unrolled DFE in 22-nm CMOS. - Pin-Yuan Chiu; Shen-Iuan Liu (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)