4.3 A 20nm 2.5GHz ultra-low-power tri-cluster CPU subsystem with adaptive power allocation for optimal mobile SoC performance. - Hugh Mair; Gordon Gammie; Alice Wang; Rolf Lagerquist; C. J. Chung; Sumanth Gururajarao; Ping Kao; Anand Rajagopalan; Anirban Saha; Amit Jain; Ericbill Wang; Shichin Ouyang; et al. (ISSCC, 2016)

3.4 A 10nm FinFET 2.8GHz tri-gear deca-core CPU complex with optimized power-delivery network for mobile SoC performance. - Hugh Mair; Ericbill Wang; Alice Wang; Ping Kao; Yuwen Tsai; Sumanth Gururajarao; Rolf Lagerquist; Jin Son; Gordon Gammie; Gordon Lin; Achuta Thippana; Kent Li; et al. (ISSCC, 2017)

35.1 An Octa-Core 2.8/2GHz Dual-Gear Sensor-Assisted High-Speed and Power-Efficient CPU in 7nm FinFET 5G Smartphone SoC. - Bo-Jr Huang; Eric Jia-Wei Fang; Sung S.-Y. Hsueh; Rory Huang; Angus Lin; Chi-Hsun Chiang; Yi-Hsuan Lin; Wen-Wen Hsieh; Barry Chen; Yi-Chang Zhuang; Cheng-Yuh Wu; Jia-Ming Chen; et al. (ISSCC, 2021)

A 5G Mobile Gaming-Centric SoC with High-Performance Thermal Management in 4nm FinFET. - Bo-Jr Huang; Alfred Tsai; Lear Hsieh; Kathleen Chang; C.-J. Tsai; Jia-Ming Chen; Eric Jia-Wei Fang; Sung S.-Y. Hsueh; Jack Ciao; Barry Chen; Chuck Chang; Ping Kao; et al. (ISSCC, 2023)

14.4 A Fully Digital Current Sensor Offering Per-Core Runtime Power for System Budgeting in a 4nm-Plus Octa-Core CPU. - Chien-Yu Lu; Bo-Jr Huang; Min-Chieh Chen; Ollie Tsai; Alfred Tsai; Eric Jia-Wei Fang; Yuju Cho; Harry H. Chen; Ping Kao; Ericbill Wang; Hugh Mair; Shih-Arn Hwang (ISSCC, 2024)