UVM based STBUS verification IP for verifying SoC architectures. - Pranay Samanta; Deepak Chauhan; Sujay Deb; Piyush Kumar Gupta (VDAT, 2014)

Accelerating SystemVerilog UVM Based VIP to Improve Methodology for Verification of Image Signal Processing Designs Using HW Emulator. - Abhishek Jain 003; Piyush Kumar Gupta; Hima Gupta; Sachish Dhar (CoRR, 2014)

DFT+Emulation - A Faster Way to Close Verification. - Jitendra Aggarwal; Tran Nguyen; Piyush Kumar Gupta (QRS Companion, 2018)