Path-Diversity-Aware Adaptive Routing in Network-on-Chip Systems. - Yu-Hsin Kuo; Po-An Tsai; Hao-Ping Ho; En-Jui Chang; Hsien-Kai Hsin; An-Yeu Andy Wu (MCSoC, 2012)

Hybrid path-diversity-aware adaptive routing with latency prediction model in Network-on-Chip systems. - Po-An Tsai; Yu-Hsin Kuo; En-Jui Chang; Hsien-Kai Hsin; An-Yeu Wu (VLSI-DAT, 2013)

Scaling distributed cache hierarchies through computation and data co-scheduling. - Nathan Beckmann; Po-An Tsai; Daniel Sánchez 003 (HPCA, 2015)

Feature space optimization of multispectral imagery and LiDAR waveform data. - Yu-Ching Lin; Po-An Tsai; Chun-Lin Lin; Kuan-Tsung Chang; Ming-Da Tsai (IGARSS, 2015)

Uncertainty and Mental Workload Among Wayfinding Strategies. - Yi Chia Chien; Po-An Tsai; Yu Ting Lin; Ssu Min Wu; Kuan Ting Chen; Yu Ting Han; Philip Hwang (HCI (9), 2016)

Nexus: A New Approach to Replication in Distributed Shared Caches. - Po-An Tsai; Nathan Beckmann; Daniel Sánchez 003 (PACT, 2017)

Jenga: Software-Defined Cache Hierarchies. - Po-An Tsai; Nathan Beckmann; Daniel Sánchez 003 (ISCA, 2017)

KPart: A Hybrid Cache Partitioning-Sharing Technique for Commodity Multicores. - Nosayba El-Sayed; Anurag Mukkara; Po-An Tsai; Harshad Kasture; Xiaosong Ma; Daniel Sánchez 003 (HPCA, 2018)

Adaptive Scheduling for Systems with Asymmetric Memory Hierarchies. - Po-An Tsai; Changping Chen; Daniel Sánchez 003 (MICRO, 2018)

Rethinking the Memory Hierarchy for Modern Languages. - Po-An Tsai; Yee Ling Gan; Daniel Sánchez 003 (MICRO, 2018)

Compress Objects, Not Cache Lines: An Object-Based Compressed Memory Hierarchy. - Po-An Tsai; Daniel Sánchez 003 (ASPLOS, 2019)

Safecracker: Leaking Secrets through Compressed Caches. - Po-An Tsai; Andrés Sánchez; Christopher W. Fletcher; Daniel Sánchez 003 (ASPLOS, 2020)

Union: A Unified HW-SW Co-Design Ecosystem in MLIR for Evaluating Tensor Operations on Spatial Accelerators. - Geonhwa Jeong; Gokcen Kestor; Prasanth Chatarasi; Angshuman Parashar; Po-An Tsai; Sivasankaran Rajamanickam; Roberto Gioiosa; Tushar Krishna (PACT, 2021)

Mind mappings: enabling efficient algorithm-accelerator mapping space search. - Kartik Hegde; Po-An Tsai; Sitao Huang; Vikas Chandra; Angshuman Parashar; Christopher W. Fletcher (ASPLOS, 2021)

Sparseloop: An Analytical, Energy-Focused Design Space Exploration Methodology for Sparse Tensor Accelerators. - Yannan Nellie Wu; Po-An Tsai; Angshuman Parashar; Vivienne Sze; Joel S. Emer (ISPASS, 2021)

Leaking Secrets Through Compressed Caches. - Po-An Tsai; Andrés Sánchez; Christopher W. Fletcher; Daniel Sánchez 003 (IEEE Micro, 2021)

Demystifying Map Space Exploration for NPUs. - Sheng-Chun Kao; Angshuman Parashar; Po-An Tsai; Tushar Krishna (IISWC, 2022)

SIMD2: a generalized matrix instruction set for accelerating tensor computation beyond GEMM. - Yunan Zhang; Po-An Tsai; Hung-Wei Tseng 001 (ISCA, 2022)

Ruby: Improving Hardware Efficiency for Tensor Algebra Accelerators Through Imperfect Factorization. - Mark Horeni; Pooria Taheri; Po-An Tsai; Angshuman Parashar; Joel S. Emer; Siddharth Joshi 001 (ISPASS, 2022)

Sparseloop: An Analytical Approach To Sparse Tensor Accelerator Modeling. - Yannan Nellie Wu; Po-An Tsai; Angshuman Parashar; Vivienne Sze; Joel S. Emer (MICRO, 2022)

Accelerating Sparse Data Orchestration via Dynamic Reflexive Tiling. - Toluwanimi O. Odemuyiwa; Hadi Asghari Moghaddam; Michael Pellauer; Kartik Hegde; Po-An Tsai; Neal Clayton Crago; Aamer Jaleel; John D. Owens; Edgar Solomonik; Joel S. Emer; Christopher W. Fletcher (ASPLOS (3), 2023)

Accelerating Sparse Data Orchestration via Dynamic Reflexive Tiling (Extended Abstract). - Toluwanimi O. Odemuyiwa; Hadi Asghari Moghaddam; Michael Pellauer; Kartik Hegde; Po-An Tsai; Neal Clayton Crago; Aamer Jaleel; John D. Owens; Edgar Solomonik; Joel S. Emer; Christopher W. Fletcher (HOPC@SPAA, 2023)

RM-STC: Row-Merge Dataflow Inspired GPU Sparse Tensor Core for Energy-Efficient Sparse Acceleration. - Guyue Huang; Zhengyang Wang; Po-An Tsai; Chen Zhang 001; Yufei Ding 001; Yuan Xie 001 (MICRO, 2023)

HighLight: Efficient and Flexible DNN Acceleration with Hierarchical Structured Sparsity. - Yannan Nellie Wu; Po-An Tsai; Saurav Muralidharan; Angshuman Parashar; Vivienne Sze; Joel S. Emer (MICRO, 2023)

Symphony: Orchestrating Sparse and Dense Tensors with Hierarchical Heterogeneous Processing. - Michael Pellauer; Jason Clemons; Vignesh Balaji; Neal Clayton Crago; Aamer Jaleel; Donghyuk Lee; Mike O'Connor; Anghsuman Parashar; Sean Treichler; Po-An Tsai; Stephen W. Keckler; Joel S. Emer (ACM Trans. Comput. Syst., 2023)

Mind the Gap: Attainable Data Movement and Operational Intensity Bounds for Tensor Algorithms. - Qijing Huang 001; Po-An Tsai; Joel S. Emer; Angshuman Parashar (ISCA, 2024)

Sparsepipe: Sparse Inter-operator Dataflow Architecture with Cross-Iteration Reuse. - Yunan Zhang; Po-An Tsai; Hung-Wei Tseng 001 (MICRO, 2024)

Abstracting Sparse DNN Acceleration via Structured Sparse Tensor Decomposition. - Geonhwa Jeong; Po-An Tsai; Abhimanyu Rajeshkumar Bambhaniya; Stephen W. Keckler; Tushar Krishna (CoRR, 2024)

SDQ: Sparse Decomposed Quantization for LLM Inference. - Geonhwa Jeong; Po-An Tsai; Stephen W. Keckler; Tushar Krishna (CoRR, 2024)

RocketKV: Accelerating Long-Context LLM Inference via Two-Stage KV Cache Compression. - Payman Behnam; Yaosheng Fu; Ritchie Zhao; Po-An Tsai; Zhiding Yu; Alexey Tumanov (CoRR, 2025)

Utility-Driven Speculative Decoding for Mixture-of-Experts. - Anish Saxena; Po-An Tsai; Hritvik Taneja; Aamer Jaleel; Moinuddin Qureshi (CoRR, 2025)