FSM-based programmable memory BIST with macro command. - Po-Chang Tsai; Sying-Jyan Wang; Feng-Ming Chang (MTDT, 2005)

Test Data and Test Time Reduction for LOS Transition Test in Multi-Mode Segmented Scan Architecture. - Sying-Jyan Wang; Po-Chang Tsai; Hung-Ming Weng; Katherine Shu-Min Li (ATS, 2007)

Test Data Compression for Minimum Test Application Time. - Po-Chang Tsai; Sying-Jyan Wang; Ching-Hung Lin; Tung-Hua Yeh (J. Inf. Sci. Eng., 2007)

Multi-mode-segmented scan architecture with layout-aware scan chain routing for test data and test time reduction. - Po-Chang Tsai; Sying-Jyan Wang (IET Comput. Digit. Tech., 2008)