CDSP: an application-specific digital signal processor for third generation wireless communications. - Po-Chih Tseng; Chi-Kuang Chen; Liang-Gee Chen (IEEE Trans. Consumer Electron., 2001)

Generic RAM-based architecture for two-dimensional discrete wavelet transform with line-based method. - Po-Chih Tseng; Chao-Tsung Huang; Liang-Gee Chen (APCCAS (1), 2002)

Efficient VLSI architectures of lifting-based discrete wavelet transform by systematic design method. - Chao-Tsung Huang; Po-Chih Tseng; Liang-Gee Chen (ISCAS (5), 2002)

VLSI implementation of shape-adaptive discrete wavelet transform. - Po-Chih Tseng; Chao-Tsung Huang; Liang-Gee Chen (VCIP, 2002)

Hardware implementation of shape-adaptive discrete wavelet transform with the JPEG2000 defaulted (9, 7) filter bank. - Chao-Tsung Huang; Po-Chih Tseng; Liang-Gee Chen (ICIP (2), 2003)

Memory analysis and architecture for two-dimensional discrete wavelet transform. - Chao-Tsung Huang; Po-Chih Tseng; Liang-Gee Chen (ICASSP (5), 2004)

B-spline factorization-based architecture for inverse discrete wavelet transform. - Chao-Tsung Huang; Po-Chih Tseng; Liang-Gee Chen (ISCAS (2), 2004)

Low-power parallel tree architecture for full search block-matching motion estimation. - Siou-Shen Lin; Po-Chih Tseng; Liang-Gee Chen (ISCAS (2), 2004)

Reconfigurable discrete cosine transform processor for object-based video signal processing. - Po-Chih Tseng; Chao-Tsung Huang; Liang-Gee Chen (ISCAS (2), 2004)

Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform. - Chao-Tsung Huang; Po-Chih Tseng; Liang-Gee Chen (IEEE Trans. Signal Process., 2004)

Nearly Lossless Content-Dependent Low-Power DCT Design for Mobile Video Applications. - Chia-Ping Lin; Po-Chih Tseng; Liang-Gee Chen (ICME, 2005)

Multiple-lifting scheme: memory-efficient VLSI implementation for line-based 2-D DWT. - Chih-Chi Cheng; Chao-Tsung Huang; Po-Chih Tseng; Chia-Ho Pan; Liang-Gee Chen (ISCAS (5), 2005)

Advances in Hardware Architectures for Image and Video Coding - A Survey. - Po-Chih Tseng; Yung-Chi Chang; Yu-Wen Huang; Hung-Chi Fang; Chao-Tsung Huang; Liang-Gee Chen (Proc. IEEE, 2005)

Generic RAM-based architectures for two-dimensional discrete wavelet transform with line-based method. - Chao-Tsung Huang; Po-Chih Tseng; Liang-Gee Chen (IEEE Trans. Circuits Syst. Video Technol., 2005)

Analysis and VLSI architecture for 1-D and 2-D discrete wavelet transform. - Chao-Tsung Huang; Po-Chih Tseng; Liang-Gee Chen (IEEE Trans. Signal Process., 2005)

VLSI Architecture for Lifting-Based Shape-Adaptive Discrete Wavelet Transform with Odd-Symmetric Filters. - Chao-Tsung Huang; Po-Chih Tseng; Liang-Gee Chen (J. VLSI Signal Process., 2005)

VLSI Architecture for Forward Discrete Wavelet Transform Based on B-spline Factorization. - Chao-Tsung Huang; Po-Chih Tseng; Liang-Gee Chen (J. VLSI Signal Process., 2005)

Reconfigurable Discrete Wavelet Transform Processor for Heterogeneous Reconfigurable Multimedia Systems. - Po-Chih Tseng; Chao-Tsung Huang; Liang-Gee Chen (J. VLSI Signal Process., 2005)

A 5mW MPEG4 SP encoder with 2D bandwidth-sharing motion estimation for mobile applications. - Chia-Ping Lin; Po-Chih Tseng; Yao-Ting Chiu; Siou-Shen Lin; Chih-Chi Cheng; Hung-Chi Fang; Wei-Min Chao; Liang-Gee Chen (ISSCC, 2006)

Reconfigurable architecture for video applications. - Chung-Jr Lian; Po-Chih Tseng; Tung-Chien Chen; Yu-Wei Chang; Liang-Gee Chen (SoCC, 2007)

Multimode Embedded Compression Codec Engine for Power-Aware Video Coding System. - Chih-Chi Cheng; Po-Chih Tseng; Liang-Gee Chen (IEEE Trans. Circuits Syst. Video Technol., 2009)