Testing And Diagnosis Of Board Interconnects In Microprocessor-Based Systems. - Po-Ching Hsu; Sying-Jyan Wang (Asian Test Symposium, 1996)

At-Speed Logic BIST for IP Cores. - B. Cheon; E. Lee; Laung-Terng Wang; Xiaoqing Wen; Po-Ching Hsu; Jin Woo Cho; J. Park; Hao-Jan Chao; Shianling Wu (DATE, 2005)

At-Speed Logic BIST Architecture for Multi-Clock Designs. - Laung-Terng Wang; Xiaoqing Wen; Po-Ching Hsu; Shianling Wu; Jonhson Guo (ICCD, 2005)