A 1-V CMOS Pseudo-Differential Amplifier With Multiple Common-Mode Stabilization and Frequency Compensation Loops. - Meng-Hung Shen; Po-Hsiang Lan; Po-Chiun Huang (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Design of a process-insensitive digital controller for high-frequency DC-DC SMPS. - Po-Hsiang Lan; Chun-Yen Tseng; Po-Chiun Huang (APCCAS, 2010)

An asynchronous digitally-controlled switching converter with adaptive resolution and dynamic power saving to achieve higher than 93.5% efficiency between 5mA and 250mA load. - Po-Hsiang Lan; Tsung-Ju Yang; Po-Chiun Huang (A-SSCC, 2011)

An area-efficient CMOS switching converter with on-chip LC filter using feedforward ripple cancellation technique. - Po-Hsiang Lan; Yao-Jun Kuo; Po-Chiun Huang (VLSI-DAT, 2012)

A High Efficiency FLL-Assisted Current-Controlled DC-DC Converter Over Light-Loaded Range. - Po-Hsiang Lan; Po-Chiun Huang (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

A High-Efficiency, Wide Workload Range, Digital Off-Time Modulation (DOTM) DC-DC Converter With Asynchronous Power Saving Technique. - Po-Hsiang Lan; Tsung-Ju Yang; Po-Chiun Huang (IEEE Trans. Very Large Scale Integr. Syst., 2013)

A 1 V Input, 3 V-to-6 V Output, 58%-Efficient Integrated Charge Pump With a Hybrid Topology for Area Reduction and an Improved Efficiency by Using Parasitics. - Jen-Huan Tsai; Sheng-An Ko; Chia-Wei Wang; Yang-Chi Yen; Hui-Huan Wang; Po-Chiun Huang; Po-Hsiang Lan; Meng-Hung Shen (IEEE J. Solid State Circuits, 2015)

Cooperation between Distributed Power Modules for SoC Power Management. - Po-Chiun Huang; Shin-Jie Huang; Po-Hsiang Lan (IEICE Trans. Electron., 2016)