Hyperscalar: A Novel Dynamically Reconfigurable Multi-core Architecture. - Jih-Ching Chiu; Yu-Liang Chou; Po-Kai Chen (ICPP, 2010)

A Unitable Computing Architecture for Chip Multiprocessors. - Jih-Ching Chiu; Yu-Liang Chou; Po-Kai Chen; Ding-Siang Su (Comput. J., 2011)

High speed DDR2/3 PHY and dual CPU core design for 28nm SoC. - Kevin Ho; Tsung-Yi Chou; Po-Kai Chen; David J. Liou (VLSI-DAT, 2012)

NCU1415 at ROCLING 2022 Shared Task: A light-weight transformer-based approach for Biomedical Name Entity Recognition. - Zhi-Quan Feng; Po-Kai Chen; Jia-Ching Wang (ROCLING, 2022)

Question Answering System Based on Pre-Training Model and Retrieval Reranking for Industry 4.0. - Ta-Fu Chen; Yi-Xing Lin; Ming-Hsiang Su; Po-Kai Chen; Tzu-Chiang Tai; Jia-Ching Wang (APSIPA ASC, 2023)

Mixture of Ordered Scoring Experts for Cross-prompt Essay Trait Scoring. - Po-Kai Chen; Bo-Wei Tsai; Shao-Kuan Wei; Chien-Yao Wang; Jia-Ching Wang; Yi-Ting Huang (ACL (1), 2025)