Process-Tolerant Low-Power Adaptive Pipeline under Scaled-Vdd. - Swaroop Ghosh; Pooja Batra; Keejong Kim; Kaushik Roy 001 (CICC, 2007)

Three-Dimensional Dynamic Random Access Memories Using Through-Silicon-Vias. - Toshiaki Kirihata; John Golz; Matthew R. Wordeman; Pooja Batra; Gary W. Maier; Norman Robson; Troy L. Graves-abe; Daniel Berger; Subramanian S. Iyer (IEEE J. Emerg. Sel. Topics Circuits Syst., 2016)