Synthesis of LUT Based Approximating Adder Circuits with Formal Error Guarantees. - Pooja Choudhary; Lava Bhargava; Masahiro Fujita; Virendra Singh (VDAT, 2022)

Approximating Arithmetic Circuits for IoT Devices Data Processing. - Pooja Choudhary; Lava Bhargava; Masahiro Fujita; Virendra Singh; Ashok Kumar Suhag (Comput. Ind. Eng., 2022)

Optimization of Imprecise Multiplier Circuits by using Binary Decision Diagram. - Pooja Choudhary; Lava Bhargava; G. U. Vinod; Ashok Kumar Suhag; Masahiro Fujita; Virendra Singh (iSES, 2023)

LUT-based Arithmetic Circuit Approximation with Formal Guarantee on Worst Case Relative Error. - Pooja Choudhary; Lava Bhargava; Masahiro Fujita; Virendra Singh (LATS, 2023)

Designing of Energy-Efficient Approximate Multiplier Circuit for Processing Unit of IoT Devices. - Pooja Choudhary; Lava Bhargava; Ashok Kumar Suhag (SN Comput. Sci., 2023)