UCA: An Energy-efficient Hybrid Uncore Architecture in 3D Chip-Multiprocessors to minimize crosstalk. - Pooneh Safayenikoo; Arghavan Asad; Kaamran Raahemifar; Mahmood Fathy (NoCArc@MICRO, 2016)

Exploiting non-uniformity of write accesses for designing a high-endurance hybrid Last Level Cache in 3D CMPs. - Pooneh Safayenikoo; Arghavan Asad; Mahmood Fathy; Farah Mohammadi 001 (CCECE, 2017)

A new traffic compression method for end-to-end memory accesses in 3D chip-multiprocessors. - Pooneh Safayenikoo; Arghavan Asad; Mahmood Fathy; Farah Mohammadi 001 (CCECE, 2017)

An energy efficient non-uniform Last Level Cache Architecture in 3D chip-multiprocessors. - Pooneh Safayenikoo; Arghavan Asad; Mahmood Fathy; Farah Mohammadi 001 (ISQED, 2017)

An Energy-Efficient Cache Architecture for Chip-Multiprocessors Based on Non-Uniformity Accesses. - Pooneh Safayenikoo; Arghavan Asad; Farah Mohammadi 001 (CCECE, 2018)

NIZCache: Energy-efficient Non-uniform Cache Architecture for Chip-multiprocessors Based on Invalid and Zero Lines. - Pooneh Safayenikoo; Arghavan Asad; Mahmood Fathy; Farah Mohammadi 001 (ISCAS, 2018)

Weight Update Skipping: Reducing Training Time for Artificial Neural Networks. - Pooneh Safayenikoo; Ismail Akturk (IEEE J. Emerg. Sel. Topics Circuits Syst., 2021)

Energy-efficient Non Uniform Last Level Caches for Chip-multiprocessors Based on Compression. - Pooneh Safayenikoo; Arghavan Asad; Mahmood Fathy (CoRR, 2022)

CXLMemSim: A pure software simulated CXL.mem for performance characterization. - Yiwei Yang 002; Pooneh Safayenikoo; Jiacheng Ma 001; Tanvir Ahmed Khan; Andrew Quinn 001 (CoRR, 2023)