Fault injection-based evaluation of a synchronous NoC router. - Ashkan Eghbal; Pooria M. Yaghini; Hossein Pedram; Hamid R. Zarandi (IOLTS, 2009)

Fault tolerance assessment of PIC microcontroller based on fault injection. - Ashkan Eghbal; Hamid R. Zarandi; Pooria M. Yaghini (LATW, 2009)

Investigation of Transient Fault Effects in an Asynchronous NoC Router. - Pooria M. Yaghini; Ashkan Eghbal; Hossein Pedram; Hamid R. Zarandi (PDP, 2010)

Test Documentation Tools and CBR Reduce the Cost of Testing. - Golnoosh Abaee; Pooria M. Yaghini (Software Engineering Research and Practice, 2010)

Investigation of transient fault effects in synchronous and asynchronous Network on Chip router. - Pooria M. Yaghini; Ashkan Eghbal; Hossein Pedram; Hamid R. Zarandi (J. Syst. Archit., 2011)

TSV-to-TSV inductive coupling-aware coding scheme for 3D Network-on-Chip. - Ashkan Eghbal; Pooria M. Yaghini; Siavash S. Yazdi; Nader Bagherzadeh (DFT, 2014)

A GALS Router for Asynchronous Network-on-Chip. - Pooria M. Yaghini; Ashkan Eghbal; Nader Bagherzadeh (MES, 2014)

Accurate System-level TSV-to-TSV Capacitive Coupling Fault Model for 3D-NoC. - Pooria M. Yaghini; Ashkan Eghbal; Siavash S. Yazdi; Nader Bagherzadeh (NOCS, 2015)

Capacitive Coupling Mitigation for TSV-based 3D ICs. - Ashkan Eghbal; Pooria M. Yaghini; Nader Bagherzadeh (VTS, 2015)

On the design of hybrid routing mechanism for mesh-based network-on-chip. - Pooria M. Yaghini; Ashkan Eghbal; Nader Bagherzadeh (Integr., 2015)

Analytical Reliability Analysis of 3D NoC under TSV Failure. - Misagh Khayambashi; Pooria M. Yaghini; Ashkan Eghbal; Nader Bagherzadeh (ACM J. Emerg. Technol. Comput. Syst., 2015)

Analytical Fault Tolerance Assessment and Metrics for TSV-Based 3D Network-on-Chip. - Ashkan Eghbal; Pooria M. Yaghini; Nader Bagherzadeh; Misagh Khayambashi (IEEE Trans. Computers, 2015)

Coupling Mitigation in 3-D Multiple-Stacked Devices. - Pooria M. Yaghini; Ashkan Eghbal; Misagh Khayambashi; Nader Bagherzadeh (IEEE Trans. Very Large Scale Integr. Syst., 2015)

ADVOCAT: Automated deadlock verification for on-chip cache coherence and interconnects. - Freek Verbeek; Pooria M. Yaghini; Ashkan Eghbal; Nader Bagherzadeh (DATE, 2016)

Capacitive and Inductive TSV-to-TSV Resilient Approaches for 3D ICs. - Pooria M. Yaghini; Ashkan Eghbal; Siavash S. Yazdi; Nader Bagherzadeh; Michael M. Green (IEEE Trans. Computers, 2016)

Resilient 3D Network-on-Chip Design and Analysis - Pooria M. Yaghini (2016)

Deadlock Verification of Cache Coherence Protocols and Communication Fabrics. - Freek Verbeek; Pooria M. Yaghini; Ashkan Eghbal; Nader Bagherzadeh (IEEE Trans. Computers, 2017)

A Compositional Approach for Verifying Protocols Running on On-Chip Networks. - Freek Verbeek; Pooria M. Yaghini; Ashkan Eghbal; Nader Bagherzadeh (IEEE Trans. Computers, 2018)

SpecLock: Speculative Lock Forwarding. - Pooria M. Yaghini; George Michelogiannakis; Paul V. Gratz (ICCD, 2019)

Application Characterization for Near Memory Processing. - Maryam S. Hosseini; Masoumeh Ebrahimi; Pooria M. Yaghini; Nader Bagherzadeh (PDP, 2021)

Near Volatile and Non-Volatile Memory Processing in 3D Systems. - Maryam S. Hosseini; Masoumeh Ebrahimi; Pooria M. Yaghini; Nader Bagherzadeh (IEEE Trans. Emerg. Top. Comput., 2022)