TNN7: A Custom Macro Suite for Implementing Highly Optimized Designs of Neuromorphic TNNs. - Harideep Nair; Prabhu Vellaisamy; Santha Bhasuthkar; John Paul Shen (ISVLSI, 2022)

Towards a Design Framework for TNN-Based Neuromorphic Sensory Processing Units. - Prabhu Vellaisamy; John Paul Shen (CoRR, 2022)

tuGEMM: Area-Power-Efficient Temporal Unary GEMM Architecture for Low-Precision Edge AI. - Harideep Nair; Prabhu Vellaisamy; Albert Chen 002; Joseph Finn; Anna Li; Manav Trivedi; John Paul Shen (ISCAS, 2023)

tubGEMM: Energy-Efficient and Sparsity-Effective Temporal-Unary-Binary Based Matrix Multiply Unit. - Prabhu Vellaisamy; Harideep Nair; Joseph Finn; Manav Trivedi; Albert Chen 002; Anna Li; Tsung-Han Lin; Perry H. Wang; Ronald Shawn Blanton; John Paul Shen (ISVLSI, 2023)

Realtime Person Identification via Gait Analysis Using IMU Sensors on Edge Devices. - Shanmuga Venkatachalam; Harideep Nair; Prabhu Vellaisamy; Yongqi Zhou; Ziad Youssfi; John Paul Shen (ICONS, 2024)

Exploration of Unary Arithmetic-Based Matrix Multiply Units for Low Precision DL Accelerators. - Prabhu Vellaisamy; Harideep Nair; Di Wu; R. D. Shawn Blanton; John Paul Shen (ISVLSI, 2024)

Commercial Evaluation of Zero-Skipping MAC Design for Bit Sparsity Exploitation in DL Inference. - Harideep Nair; Prabhu Vellaisamy; Tsung-Han Lin; Perry H. Wang; Ronald Shawn Blanton; John Paul Shen (VLSI-SoC, 2024)

OzMAC: An Energy-Efficient Sparsity-Exploiting Multiply-Accumulate-Unit Design for DL Inference. - Harideep Nair; Prabhu Vellaisamy; Tsung-Han Lin; Perry H. Wang; Ronald Shawn Blanton; John Paul Shen (CoRR, 2024)

Realtime Person Identification via Gait Analysis. - Shanmuga Venkatachalam; Harideep Nair; Prabhu Vellaisamy; Yongqi Zhou; Ziad Youssfi; John Paul Shen (CoRR, 2024)

TNNGen: Automated Design of Neuromorphic Sensory Processing Units for Time-Series Clustering. - Prabhu Vellaisamy; Harideep Nair; Vamsikrishna Ratnakaram; Dhruv Gupta; John Paul Shen (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Tempus Core: Area-Power Efficient Temporal-Unary Convolution Core for Low-Precision Edge DLAs. - Prabhu Vellaisamy; Harideep Nair; Thomas Kang; Yichen Ni; Haoyang Fan; Bin Qi; Jeff Chen; R. D. Shawn Blanton; John Paul Shen (DATE, 2025)

Characterizing and Optimizing LLM Inference Workloads on CPU-GPU Coupled Architectures. - Prabhu Vellaisamy; Thomas Labonte; Sourav Chakraborty 007; Matt Turner; Samantika Sury; John Paul Shen (ISPASS, 2025)

Catwalk: Unary Top-K for Efficient Ramp-No-Leak Neuron Design for Temporal Neural Networks. - Devon Lister; Prabhu Vellaisamy; John Paul Shen; Di Wu (ISVLSI, 2025)