Contention reduced/conditional discharge flip-flops for level conversion in CVS systems. - Peiyi Zhao; Pradeep Kumar Golconda; Magdy A. Bayoumi (ISCAS (2), 2004)

A Double-Edge Implicit-Pulsed Level Convert Flip-Flop. - Peiyi Zhao; Pradeep Kumar Golconda; C. Archana; Magdy A. Bayoumi (ISVLSI, 2004)

Noise-tolerant high fan-in dynamic CMOS circuit design. - Walid Elgharbawy; Pradeep Golconda; Magdy A. Bayoumi (ACM Great Lakes Symposium on VLSI, 2005)

A new gate-level body biasing technique for PMOS transistors in subthreshold CMOS circuits. - Walid Elgharbawy; Pradeep Golconda; Ashok Kumar 001; Magdy A. Bayoumi (ISCAS (5), 2005)

A Low Power Domino with Differential-Controlled-Keeper. - Peiyi Zhao; Jason McNeely; Magdy A. Bayoumi; Pradeep Kumar Golconda; Weidong Kuang (ISCAS, 2007)

Novel Adaptive Body Biasing Techniques for Energy Efficient Subthreshold CMOS Circuits. - Walid Elgharbawy; Pradeep Golconda; Abdelhamid G. Moursy; Magdy A. Bayoumi (J. Low Power Electron., 2007)

Low-Power Clock Branch Sharing Double-Edge Triggered Flip-Flop. - Peiyi Zhao; Jason McNeely; Pradeep Golconda; Magdy A. Bayoumi; Robert A. Barcenas; Weidong Kuang (IEEE Trans. Very Large Scale Integr. Syst., 2007)

Low-Power Clocked-Pseudo-NMOS Flip-Flop for Level Conversion in Dual Supply Systems. - Peiyi Zhao; Jason McNeely; Pradeep Kumar Golconda; Soujanya Venigalla; Nan Wang; Magdy A. Bayoumi; Weidong Kuang; Luke Downey (IEEE Trans. Very Large Scale Integr. Syst., 2009)