High-Speed CMOS-Free Purely Spintronic Asynchronous Recurrent Neural Network. - Pranav O. Mathews; Christian B. Duffee; Abel Thayil; Ty E. Stovall; Christopher H. Bennett; Felipe García-Sánchez; Matthew J. Marinella; Jean Anne C. Incorvia; Naimul Hassan; Xuan Hu; Joseph S. Friedman (CoRR, 2021)

Physical Computing for Hopfield Networks on a Reconfigurable Analog IC. - Pranav O. Mathews; Jennifer O. Hasler (ISCAS, 2023)

Toward Biorealistic Silicon Neural Circuits on Reconfigurable Platforms. - Swagat Bhattacharyya; Pranav O. Mathews; Praveen Raj Ayyappan; Jennifer O. Hasler (MWSCAS, 2023)

A 65nm and 130nm CMOS Programmable Analog Standard Cell Library for Scalable System Synthesis. - Pranav O. Mathews; Praveen Raj Ayyappan; Afolabi Ige; Swagat Bhattacharyya; Linhao Yang; Jennifer Hasler (CICC, 2024)

Architectural Considerations for Scalable Analog Ising Machines. - Pranav O. Mathews; Jennifer O. Hasler (ICRC, 2024)

A 130nm CMOS Programmable Analog Standard Cell Library. - Jennifer Hasler; Praveen Raj Ayyappan; Afolabi Ige; Pranav O. Mathews (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

Hopfield vs Ising: A Comparison on the SoC FPAA. - Pranav O. Mathews; Jennifer O. Hasler (IEEE Trans. Circuits Syst. I Regul. Pap., 2024)

A 65 nm CMOS Analog Programmable Standard Cell Library for Mixed-Signal Computing. - Pranav O. Mathews; Praveen Raj Ayyappan; Afolabi Ige; Swagat Bhattacharyya; Linhao Yang; Jennifer O. Hasler (IEEE Trans. Very Large Scale Integr. Syst., 2024)

A Programmable and Reconfigurable CMOS Analog Hopfield Network for NP-Hard Problems. - Pranav O. Mathews; Jennifer O. Hasler (IEEE Trans. Very Large Scale Integr. Syst., 2025)