Design of Testable VLSI Circuits with Minumum Area Overhead. - Prasad R. Chalasani; Sudipta Bhawmik; Anurag Acharya 001; Parimal Palchaudhuri (IEEE Trans. Computers, 1989)

Parallel Network Dual Simplex Method on a Shared Memory Multiprocessor. - Krishnaiyan Thulasiraman; Prasad R. Chalasani; M. A. Comeau (SPDP, 1993)

Parallel Network Primal-Dual Method on a Shared Memory Multiprocessor and a Unified Approach to VLSI Layout Compaction and Wire Balancing. - Krishnaiyan Thulasiraman; Prasad R. Chalasani; Parimala Thulasiraman; M. A. Comeau (VLSI Design, 1993)

Integrated VLSI layout compaction and wire balancing on a shared memory multiprocessor: evaluation of a parallel algorithm. - Prasad R. Chalasani; Krishnaiyan Thulasiraman; M. A. Corneau (ISPAN, 1994)

Parallel computing for network optimization: a cluster-based approach for the dual transshipment problem. - Prasad R. Chalasani; Krishnaiyan Thulasiraman (SPDP, 1995)