Automatic Test Knowledge Extraction from VHDL (ATKET). - Praveen Vishakantaiah; Jacob A. Abraham; Magdy S. Abadir (DAC, 1992)

Impact of Behavioral Learning on the Compilation of Sequential Circuit Tests. - Praveen Vishakantaiah; Jacob A. Abraham (FTCS, 1993)

AMBIANT: Automatic Generation of Behavioral Modifications for Testability. - Praveen Vishakantaiah; Thomas Thomas; Jacob A. Abraham; Magdy S. Abadir (ICCD, 1993)

CHEETA: Composition of Hierarchical Sequential Tests Using ATKET. - Praveen Vishakantaiah; Jacob A. Abraham; Daniel G. Saab (ITC, 1993)

Generation of testable designs from behavioral descriptions using high level synthesis tools. - Kamal K. Varma; Praveen Vishakantaiah; Jacob A. Abraham (VTS, 1993)

Impact of behavioral modifications for testability. - Thomas Thomas; Praveen Vishakantaiah; Jacob A. Abraham (VTS, 1994)

Distributed Mixed Level Logic and Fault Simulation on the Pentium® Pro Microprocessor. - Sankaran Karthik; Mark Aitken; Glidden Martin; Srinivasu Pappula; Bob Stettler; Praveen Vishakantaiah; Manuel A. d'Abreu; Jacob A. Abraham (ITC, 1996)

TRANSPARENT: a system for RTL testability analysis, DFT guidance and hierarchical test generation. - Yiorgos Makris; Jamison Collins; Alex Orailoglu; Praveen Vishakantaiah (CICC, 1999)

Modular test generation and concurrent transparency-based test translation using gate-level ATPG. - Yiorgos Makris; Alex Orailoglu; Praveen Vishakantaiah (CICC, 2000)

Transparency-based hierarchical test generation for modular RTL designs. - Yiorgos Makris; Jamison Collins; Alex Orailoglu; Praveen Vishakantaiah (ISCAS, 2000)

DPDAT: data path direct access testing. - Kee Sup Kim; Rathish Jayabharathi; Craig Carstens; Praveen Vishakantaiah; Derek Feltham; Adrian Carbine (ITC, 2001)

A study of bridging defect probabilities on a Pentium (TM) 4 CPU. - Venkatram Krishnaswamy; A. B. Ma; Praveen Vishakantaiah (ITC, 2001)