Behavioral Partitioning with Synthesis for Multi-FPGA Architectures under Interconnect, Area, and Latency Constraints. - Preetham Lakshmikanthan; Sriram Govindarajan; Vinoo Srinivasan; Ranga Vemuri (IPDPS Workshops, 2000)

A Technique for Dynamic High-Level Exploration During Behavioral-Partitioning for Multi-Device Architectures. - Sriram Govindarajan; Vinoo Srinivasan; Preetham Lakshmikanthan; Ranga Vemuri (VLSI Design, 2000)

Robust simple hyperstable adaptive recursive algorithms. - Preetham Lakshmikanthan; Siddharth Mulchandani; Adrian Nunez (Circuits, Signals, and Systems, 2004)

A Novel Methodology to Reduce Leakage Power in CMOS Complementary Circuits. - Preetham Lakshmikanthan; Adrian Nunez (PATMOS, 2006)

Design of Ultra-Low Power Combinational Standard Library Cells Using A Novel Leakage Reduction Methodology. - Preetham Lakshmikanthan; Karan Sahni; Adrian Nunez (SoCC, 2006)

VCLEARIT: a VLSI CMOS circuit leakage reduction technique for nanoscale technologies. - Preetham Lakshmikanthan; Adrian Nunez (SIGARCH Comput. Archit. News, 2007)