High-performance noise tolerant comparator design for arithmetic circuits. - Preetisudha Meher; Kamala Kanta Mahapatra (ISPACS, 2016)

Ultralow power, noise immune stacked-double stage clocked-inverter domino technique for ultradeep submicron technology. - Sapna Rani Ghimiray; Preetisudha Meher; Pranab Kishore Dutta (Int. J. Circuit Theory Appl., 2018)

Design and Analysis of Dual Modulus Prescaler Circuit for Frequency Synthesizer. - Suraj Kumar Saw; Madhusudan Maiti; Preetisudha Meher (iSES, 2019)

An improved charge-sharing elimination pseudo-domino logic. - Sapna Rani Ghimiray; Preetisudha Meher; Pranab Kishore Dutta (Int. J. Circuit Theory Appl., 2020)

Codon usage in conserved sites is more biased compared to variable sites in the SARS-CoV-2 genome. - Madhusmita Dash; Annushree Kurmi; Preetisudha Meher; Siddhartha Sankar Satapathy; Nima D. Namsa (Int. J. Bioinform. Res. Appl., 2024)

A Robust Smart Card based Authentication and Key Agreement Scheme for WSN using Fuzzy Extractor. - Rituparna Paul; Shanvendra Rai; Subhasish Banerjee; Preetisudha Meher (Peer Peer Netw. Appl., 2024)

A Combined Approach of PUF and Physiological Data for Mutual Authentication and Key Agreement in WMSN. - Shanvendra Rai; Rituparna Paul; Subhasish Banerjee; Preetisudha Meher; Gulab Sah (J. Grid Comput., 2024)

An anonymous mutual authentication and key agreement scheme in WMSN using physiological data. - Shanvendra Rai; Rituparna Paul; Subhasish Banerjee; Preetisudha Meher (Wirel. Networks, 2024)

An efficient hybrid multifactor mutual authentication and session key agreement scheme for patient monitoring system using IoMT. - Shanvendra Rai; Rituparna Paul; Subhasish Banerjee; Preetisudha Meher (Multim. Tools Appl., 2024)