Yield optimization of analog ICs using two-step analytic modeling methods. - Carlo Guardiani; Primo Scandolara; Jacques Benkoski; Germano Nicollini (IEEE J. Solid State Circuits, 1993)

Reduced Order Macromodel of Coupled Interconnects for Timing and Functional Verification of Sub Half-micron IC Designs. - Davide Pandini; Primo Scandolara; Carlo Guardiani (ASP-DAC, 1998)

Crosstalk Aware Static Timing Analysis: A Two Step Approach. - Bruno Franzini; Cristiano Forzan; Davide Pandini; Primo Scandolara; Alessandro Dal Fabbro (ISQED, 2000)