Pritha Banerjee
Orcid: 0009-0005-3184-6871Affiliations:
- University of Calcutta, India
According to our database1,
Pritha Banerjee
authored at least 16 papers
between 2005 and 2023.
Collaborative distances:
Collaborative distances:
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Bibliography
2023
Integr., 2023
2022
Proceedings of the 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems, 2022
Proceedings of the 30th IFIP/IEEE 30th International Conference on Very Large Scale Integration, 2022
2021
A study on flare minimisation in EUV lithography by post-layout re-allocation of wire segments.
IET Circuits Devices Syst., 2021
2019
Minimization of Flare in EUVL by Simultaneous Wire Segment Perturbation and Dummification.
Proceedings of the 2019 IEEE Computer Society Annual Symposium on VLSI, 2019
2017
Post-Layout Perturbation towards Stitch Friendly Layout for Multiple E-Beam Lithography.
Proceedings of the 2017 IEEE International Conference on Computer Design, 2017
2015
Proceedings of the 2015 IFIP/IEEE International Conference on Very Large Scale Integration, 2015
2013
Proceedings of the 50th Annual Design Automation Conference 2013, 2013
2011
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011
IET Comput. Digit. Tech., 2011
2009
ACM Trans. Embed. Comput. Syst., 2009
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009
Proceedings of the VLSI Design 2009: Improving Productivity through Higher Abstraction, 2009
2007
Proceedings of the 20th International Conference on VLSI Design (VLSI Design 2007), 2007
Proceedings of the 2007 International Conference on Computing: Theory and Applications (ICCTA 2007), 2007
2005
Proceedings of the 2005 International Conference on Field Programmable Logic and Applications (FPL), 2005