CSD Optimized DWT Filter for ECG Denoising. - Gayatri Saripalli; Priyank H. Prajapati; Anand D. Darji (VDAT, 2020)

FPGA Implementation of MRMN with Step-Size Scaler Adaptive Filter for Impulsive Noise Reduction. - Priyank H. Prajapati; Anand D. Darji (Circuits Syst. Signal Process., 2020)

Two Stage Step-Size Scaler Adaptive Filter Design for ECG Denoising. - Priyank H. Prajapati; Anand D. Darji (ISCAS, 2021)

Hardware Design of Two Stage Reference Free Adaptive Filter for ECG Denoising. - Priyank H. Prajapati; Anand D. Darji (VDAT, 2022)

Hardware Efficient Low-Frequency Artifact Reduction Technique for Wearable ECG Device. - Priyank H. Prajapati; Anand D. Darji (IEEE Trans. Instrum. Meas., 2022)

Hardware implementation of 1D-CNN architecture for ECG arrhythmia classification. - Viraj Rawal; Priyank H. Prajapati; Anand D. Darji (Biomed. Signal Process. Control., 2023)