RTL-to-GDS Design Tools for Monolithic 3D ICs. - Jinwoo Kim; Gauthaman Murali; Pruek Vanna-Iampikul; Edward Lee; Daehyun Kim 004; Arjun Chaudhuri; Sanmitra Banerjee; Krishnendu Chakrabarty; Saibal Mukhopadhyay; Sung Kyu Lim (ICCAD, 2020)

Snap-3D: A Constrained Placement-Driven Physical Design Methodology for Face-to-Face-Bonded 3D ICs. - Pruek Vanna-Iampikul; Chengjia Shao; Yi-Chen Lu; Sai Pentapati; Sung Kyu Lim (ISPD, 2021)

Design Automation and Test Solutions for Monolithic 3D ICs. - Lingjun Zhu; Arjun Chaudhuri; Sanmitra Banerjee; Gauthaman Murali; Pruek Vanna-Iampikul; Krishnendu Chakrabarty; Sung Kyu Lim (ACM J. Emerg. Technol. Comput. Syst., 2022)

Glass Interposer Integration of Logic and Memory Chiplets: PPA and Power/Signal Integrity Benefits. - Pruek Vanna-Iampikul; Lingjun Zhu; Serhat Erdogan; Mohanalingam Kathaperumal; Ravi Agarwal; Ram Gupta; Kevin Rinebold; Sung Kyu Lim (DAC, 2023)

A 3D Implementation of Convolutional Neural Network for Fast Inference. - Narasinga Rao Miniskar; Pruek Vanna-Iampikul; Aaron R. Young; Sung Kyu Lim; Frank Liu 001; Jieun Yoo; Corrinne Mills; Nhan Tran; Farah Fahim; Jeffrey S. Vetter (ISCAS, 2023)

Abisko: Deep codesign of an architecture for spiking neural networks using novel neuromorphic materials. - Jeffrey S. Vetter; Prasanna Date; Farah Fahim; Shruti R. Kulkarni; Petro Maksymovych; A. Alec Talin; Marc González Tallada; Pruek Vanna-Iampikul; Aaron R. Young; David Brooks 001; Yu Cao 001; Gu-Yeon Wei; et al. (Int. J. High Perform. Comput. Appl., 2023)

Snap-3D: A Constrained Placement-Driven Physical Design Methodology for High Performance 3-D ICs. - Pruek Vanna-Iampikul; Chengjia Shao; Yi-Chen Lu; Sai Pentapati; Yun Heo; Jae-Seung Choi; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2023)

GNN-based Multi-bit Flip-flop Clustering and Post-clustering Design Optimization for Energy-efficient 3D ICs. - Pruek Vanna-Iampikul; Yi-Chen Lu; Da Eun Shim; Sung Kyu Lim (ACM Trans. Design Autom. Electr. Syst., 2023)

GNN-assisted Back-side Clock Routing Methodology for Advance Technologies. - Nesara Eranna Bethur; Pruek Vanna-Iampikul; Odysseas Zografos; Lingjun Zhu; Giuliano Sisto; Dragomir Milojevic; Alberto García Ortiz; Geert Hellings; Julien Ryckaert; Francky Catthoor; Sung Kyu Lim (DAC, 2024)

ML-based Physical Design Parameter Optimization for 3D ICs: From Parameter Selection to Optimization. - Hao-Hsiang Hsiao; Pruek Vanna-Iampikul; Yi-Chen Lu; Sung Kyu Lim (DAC, 2024)

AI-Driven Evaluation and Optimization of Bump Pitch Effects on Chiplet and Interposer Design Quality. - Seungmin Woo; Pruek Vanna-Iampikul; Sung Kyu Lim (ICCAD, 2024)

Spiking Transformer Hardware Accelerators in 3D Integration. - Boxun Xu; Junyoung Hwang; Pruek Vanna-Iampikul; Sung Kyu Lim; Peng Li 001 (ICCAD, 2024)

FastTuner: Transferable Physical Design Parameter Optimization using Fast Reinforcement Learning. - Hao-Hsiang Hsiao; Yi-Chen Lu; Pruek Vanna-Iampikul; Sung Kyu Lim (ISPD, 2024)

Back-side Design Methodology for Power Delivery Network and Clock Routing. - Pruek Vanna-Iampikul; Hang Yang; Jungyoun Kwak; Joyce X. Hu; Amaan Rahman; Nesara Eranna Bethur; Callie Hao; Shimeng Yu; Sung Kyu Lim (VLSI Technology and Circuits, 2024)

Towards 3D Acceleration for low-power Mixture-of-Experts and Multi-Head Attention Spiking Transformers. - Boxun Xu; Junyoung Hwang; Pruek Vanna-Iampikul; Yuxuan Yin; Sung Kyu Lim; Peng Li 001 (CoRR, 2024)

Placement-Aware 3D Net-to-Pad Assignment for Array-Style Hybrid Bonding 3D ICs. - Pruek Vanna-Iampikul; Jun-Sik Yoon; Chaeryung Park; Gary Yeap; Sung Kyu Lim (ISPD, 2025)

Glass Interposer Integration of Logic and Memory Chiplets: PPA and Power/Signal Integrity Benefits. - Pruek Vanna-Iampikul; Seungmin Woo; Serhat Erdogan; Lingjun Zhu; Mohanalingam Kathaperumal; Ravi Agarwal; Ram Gupta; Kevin Rinebold; Madhavan Swaminathan; Sung Kyu Lim (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2025)