A study on the improved programming characteristics of flash memory with Si3N4/SiO2 stacked tunneling dielectric. - Lu Liu; Jing-Ping Xu; L. L. Chen; Pui To Lai (Microelectron. Reliab., 2009)

Improved performance by using TaON/SiO2 as dual tunnel layer in Charge-Trapping nonvolatile memory. - J. X. Chen; Jing-Ping Xu; Lu Liu; X. D. Huang; Pui To Lai (Microelectron. Reliab., 2014)

A 2-D analytical threshold-voltage model for GeOI/GeON MOSFET with high-k gate dielectric. - Feng Ji; Jing-Ping Xu; Lu Liu; Wing Man Tang; Pui To Lai (Microelectron. Reliab., 2016)

Improved interfacial quality of GaAs metal-oxide-semiconductor device with NH3-plasma treated yittrium-oxynitride as interfacial passivation layer. - Han-Han Lu; Jing-Ping Xu; Lu Liu; Li-Sheng Wang; Pui To Lai; Wing Man Tang (Microelectron. Reliab., 2016)