A Co-Designed Neuromorphic Chip With Compact (17.9K F2) and Weak Neuron Number-Dependent Neuron/Synapse Modules. - Shaogang Hu; Guanchao Qiao; X. K. Liu; Y. H. Liu; C. M. Zhang; Yue Zuo; Pujun Zhou; Yian Liu 001; Ning Ning 002; Qi Yu 002; Yang Liu 062 (IEEE Trans. Biomed. Circuits Syst., 2022)

Batch normalization-free weight-binarized SNN based on hardware-saving IF neuron. - Guanchao Qiao; Nanning Zheng 001; Yue Zuo; Pujun Zhou; M. L. Sun; Shaogang Hu; Qi Yu 002; Y. Liu (Neurocomputing, 2023)

An efficient pruning and fine-tuning method for deep spiking neural network. - Liwei Meng; Guanchao Qiao; Xiaoyang Zhang; Jian Bai; Yue Zuo; Pujun Zhou; Yang Liu 062; Shaogang Hu (Appl. Intell., 2023)

Achieving High Core Neuron Density in a Neuromorphic Chip Through Trade-off Among Area, Power Consumption, and Data Access Bandwidth. - Pujun Zhou; Yue Zuo; Guanchao Qiao; C. M. Zhang; Zhong Zhang 002; Liwei Meng; Qi Yu 002; Yang Liu 062; Shaogang Hu (IEEE Trans. Biomed. Circuits Syst., 2023)

A 0.96pJ/SOP, 30.23K-neuron/mm2 Heterogeneous Neuromorphic Chip With Fullerene-like Interconnection Topology for Edge-AI Computing. - Pujun Zhou; Qi Yu 002; M. Chen; Y. C. Wang; Liwei Meng; Yue Zuo; Ning Ning 002; Y. Liu; Shaogang Hu; Guanchao Qiao (ISCAS, 2024)

A 0.96pJ/SOP, 30.23K-neuron/mm^2 Heterogeneous Neuromorphic Chip With Fullerene-like Interconnection Topology for Edge-AI Computing. - Pujun Zhou; Qi Yu 002; M. Chen; Y. C. Wang; Liwei Meng; Yue Zuo; Ning Ning 002; Y. Liu; Shaogang Hu; Guanchao Qiao (CoRR, 2024)

Fullerene-Inspired Efficient Neuromorphic Network-on-Chip Scheme. - Pujun Zhou; Qi Yu 002; M. Chen; Guanchao Qiao; Yue Zuo; Zhong Zhang 002; Yang Liu 062; Shaogang Hu (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Spatio-Temporal Fusion Spiking Neural Network for Frame-Based and Event-Based Camera Sensor Fusion. - Guanchao Qiao; Ning Ning 002; Yue Zuo; Pujun Zhou; Mingliang Sun; Shaogang Hu; Qi Yu 002; Yang Liu 062 (IEEE Trans. Emerg. Top. Comput. Intell., 2024)

A Neuromorphic Transformer Architecture Enabling Hardware-Friendly Edge Computing. - Pujun Zhou; R. C. Ma; Y. C. Chen; Z. T. Liu; C. Y. Liu; Liwei Meng; Guanchao Qiao; Yang Liu 062; Qi Yu 002; Shaogang Hu (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)