A fractional-N frequency synthesizer using high-OSR delta-sigma modulator and nested-PLL. - Pyoungwon Park; Dongmin Park; SeongHwan Cho (CICC, 2011)

An all-digital clock generator using a fractionally injection-locked oscillator in 65nm CMOS. - Pyoungwon Park; Jaejin Park; Hojin Park; SeongHwan Cho (ISSCC, 2012)

A 2.4 GHz Fractional-N Frequency Synthesizer With High-OSR ΔΣ Modulator and Nested PLL. - Pyoungwon Park; Dongmin Park; SeongHwan Cho (IEEE J. Solid State Circuits, 2012)

A resistor-based temperature sensor for a real time clock with ±2ppm frequency stability. - Pyoungwon Park; Kofi A. A. Makinwa; David Ruffieux (ESSCIRC, 2014)

5.10 A 4.7MHz 53μW fully differential CMOS reference clock oscillator with -22dB worst-case PSNR for miniaturized SoCs. - Junghyup Lee; Pyoungwon Park; SeongHwan Cho; Minkyu Je (ISSCC, 2015)

A Thermistor-Based Temperature Sensor for a Real-Time Clock With ± 2 ppm Frequency Stability. - Pyoungwon Park; David Ruffieux; Kofi A. A. Makinwa (IEEE J. Solid State Circuits, 2015)

Digital Compensation Method for the Path Delay Mismatches in GRO-TDC. - Pyoungwon Park; Dipankar Nag; Dan Lei Yan; Muthukumaraswamy Annamalai Arasu (J. Circuits Syst. Comput., 2016)

Experimental Validation of High Precision Web Handling for a Two-Actuator-Based Roll-to-Roll System. - Jaeyoung Kim; Kyungrok Kim; Hyunchang Kim; Pyoungwon Park; Seonghyun Lee; Taikmin Lee; Dongwoo Kang (Sensors, 2022)